Restador

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity base is
    Port (
        -- Entradas
        A : in std_logic;
        B : in std_logic;
        Cin : in std_logic;
        -- Salidas
        R : out std_logic; -- Resultado de la resta
        S : out std_logic; -- Signo
        Cout : out std_logic; -- Acarreo
        );
end base;

architecture behavioral of base is
begin
    R<=((not(B) and Cin) or (not(A) and B and not(Cin)) or (A and not(B)));
    Cout<=((A and B and Cin));
    S<=((not(A) and B and not(Cin)));
end behavioral;