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library ieee;
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use ieee.std_logic_1164.all;
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library IEEE;
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use IEEE.STD_LOGIC_1164.ALL;
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use IEEE.STD_LOGIC_ARITH.ALL;
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use IEEE.STD_LOGIC_UNSIGNED.ALL;
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port(
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a: in std_logic;
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b: in std_logic;
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Port ( a,b,S : in std_logic;
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S: in std_logic;
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O : out std_logic;
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O: out std_logic;
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);
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architecture Behavioral of MUX_2_1 is
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if (S='0') then
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	O <= a;
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with S select O <= a when '0', b when '1';
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else
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	O <= b;
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end if;	
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end Behavioral;