library ieee;
use ieee.std_logic_1164.all;


entity MUX_2_1 is
port(
a: in std_logic;
b: in std_logic;
S: in std_logic;
O: out std_logic;
);
end MUX_2_1;

architecture Behavioral of MUX_2_1 is
begin
with S select O <= a when '0', b when '1';
end Behavioral;