[wip] set_pte/pde funcs radeon_gart.c

/**
 * radeon_vm_set_update_pde - update PDE for pfn
 *
 * @rdev: radeon_device pointer
 * @vm: requested vm
 * @bo: radeon buffer object
 * @mem: ttm mem
 *
 * Update page directory and table entries for pfn (cayman+).
 */

#define RADEON_FLAG_PDE_VALID 1
int radeon_vm_set_pde(struct radeon_device *rdev, struct radeon_vm *vm,
            unsigned pfn, uint32_t flags)
{
    u64 pde_num, pte_num;

    /* DRM_INFO("-->vm_set_pde, pfn = %d, vmid = %d\n", pfn, vm->id); */

    pde_num = RADEON_GET_LAST_PDE_FOR_PFN(pfn);
    pte_num = RADEON_GET_PTE_FOR_PFN(pfn);

    /* DRM_INFO("t1\n"); */

    if (vm->pd == NULL) {
        DRM_ERROR("vm->pd is NULL. This should not happen!\n");
    }

    /* should we do this here or at init? */
    vm->pd[pde_num].addr =
        RADEON_BASE_CPU_ADDR(vm) + PDE_OFFSET(rdev, pde_num);
    /* DRM_INFO("t2\n"); */
    vm->pd[pde_num].gpu_addr =
        RADEON_BASE_GPU_ADDR(vm) + PDE_OFFSET(rdev, pde_num);
    /* DRM_INFO("t3\n"); */

    rdev->vm_manager.funcs->set_pde(
        vm->pd[pde_num].addr,
        RADEON_BASE_GPU_ADDR(vm) + PTE_OFFSET(rdev, pde_num, 0),
        flags);
    /* DRM_INFO("t4\n"); */
    return 0;
}

/**
 * radeon_vm_set_set_pte - update PDE and PTE for pfn
 *
 * @rdev: radeon_device pointer
 * @vm: requested vm
 * @bo: radeon buffer object
 * @mem: ttm mem
 *
 * Update page directory and table entries for pfn (cayman+).
 */

int radeon_vm_set_pte(struct radeon_device *rdev, struct radeon_vm *vm,
            unsigned pfn, uint64_t addr, uint32_t flags)
{
    /* u64 __iomem *pde_ptr = (void *)vm->pd; */
    u64 pde_num = RADEON_GET_LAST_PDE_FOR_PFN(pfn), pte_num;
    u64 pt_size = RADEON_PTE_COUNT * sizeof(struct radeon_pte);

    /* DRM_INFO("-->update_pte, pfn = %d, vmid = %d\n", pfn, vm->id); */

    pde_num = RADEON_GET_LAST_PDE_FOR_PFN(pfn);
    pte_num = RADEON_GET_PTE_FOR_PFN(pfn);

    /* DRM_INFO("t1\n"); */

    if (vm->pd[pde_num].pt.pte == NULL) {
        /* DRM_INFO("t2\n"); */
        vm->pd[pde_num].pt.pte = vmalloc(pt_size);

        if (vm->pd[pde_num].pt.pte == NULL)
            return -ENOMEM;

        /* DRM_INFO("t3\n"); */
        memset(vm->pd[pde_num].pt.pte, 0, pt_size);
    }

    /* DRM_INFO("t4\n"); */
    vm->pd[pde_num].pt.pte[pte_num].addr =
        RADEON_BASE_CPU_ADDR(vm) + PTE_OFFSET(rdev, pde_num, pte_num);
    /* DRM_INFO("t5\n"); */
    vm->pd[pde_num].pt.pte[pte_num].gpu_addr =
        RADEON_BASE_GPU_ADDR(vm) + PTE_OFFSET(rdev, pde_num, pte_num);
    /* DRM_INFO("t6\n"); */
    rdev->vm_manager.funcs->set_pte(
        vm->pd[pde_num].pt.pte[pte_num].addr,
        addr,
        flags);
    /* DRM_INFO("t7\n"); */
    return 0;
}