Conversor a BCD

Library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.std_logic_unsigned.all;

entity Conversor_BDC is
    Port ( Q : in  STD_LOGIC_VECTOR (3 downto 0);
           OverF : out std_logic;
           BCD : out  STD_LOGIC_VECTOR (3 downto 0));

end Conversor_BDC;

architecture Behavioral of Conversor_BDC is

CONSTANT FC: STD_LOGIC_VECTOR := "0110"; --Factor de Correccion 6 - 0110

begin

 BCD <= Q + FC when Q > "1001" else --si el codigo de entrada es mayor a 9 - 1001
          Q;

 OverF <= Q(3) and (Q(2) or Q(1));  -- Overflow

end Behavioral;