route_control

#include <intrinsics.h>
#include<iostm8s003f3.h>
#include<stdint.h>
#include<stdlib.h>
/*******************************************************************************/

/*block of define*/

#define   SetBit(reg, bit)          (reg) |= ((1U)<<(bit))
#define   ClearBit(reg,bit)       (reg) &= (~((1U)<<(bit)))
#define   InvBit(reg, bit)          (reg) ^= ((1U)<<(bit))
#define   BitIsSet(reg, bit)       (reg) & (((1U)<<(bit)) != 0U))
#define   BitIsClear(reg, bit)    (((reg) & (((1U)<<(bit))) == 0))
#define   TRUE  (1U)
#define   FALSE (0U)
#define   SIZE  (1U)
#define OVERFLOW(cur, max)         (((cur)<(max))==1)
/*******************************************************************************/

/*variable declaration block*/
uint8_t count_recieve=0U; /*Count packs recieved*/
typedef struct {
  uint8_t sig;
  uint16_t dest_id;
  uint8_t cmd;
  uint8_t sz;
  uint8_t data_ptr[249];/*we not using dinamical memory, because define maximal value of array*/
} uart_recieve;

/*******************************************************************************/

/*function declaration block*/

static void clock_init(void);
static void port_init(void);/*init port for module*/
static void UART_init(void);/*init uart set*/
static unsigned char addr_recognize(void);
static void I2C_init(uint8_t address);/*I2C initialization*/
static void write_packet(uint8_t pack);
/*******************************************************************************/

/*block of interrupt function*/

__interrupt void UART1_RXE(void);
__interrupt void I2C_ADDR(void);

/*******************************************************************************/

/*function definition block*/

static void clock_init(void){

   CLK_ICKR_HSIEN=1U;/*enable hight speed internal RC oscillator */
   CLK_CKDIVR=0x1FU;

}
/*****************/
static void port_init(void){

  PD_DDR_DDR5=1U;/*UART TX as output*/
  PB_DDR_DDR5=1U;/*SDA as output*/

}
/*****************/
static void UART_init(void){

  UART1_BRR2=0x03U;/*set baudra te 9600*/
  UART1_BRR1=0x68U;/*with 0.02% error*/
  UART1_CR2_RIEN=1U;/*reciever interrupt enable*/
  UART1_CR2_TEN=1U;/*transmitter enable*/
  UART1_CR2_REN=1U;/*reciever enable*/

  }
/*****************/
static unsigned char addr_recognize(void){

  PD_DDR=0x00U;/*ALL PORT D AS INPUT*/
  return  (PD_IDR);/*READ VALUE OF A PORT D*/

}
/*****************/
static void I2C_init(uint8_t address){

  I2C_CR1_ENGC=1U;/*general call enable*/
  I2C_CR1_PE=1U;/*peripheral enable*/
  I2C_CR2_POS=1U;/*acknowledge position of the next byte*/
  I2C_CR2_ACK=1U;/*acknowledge byte enable*/
  I2C_FREQR=4U;/*clock frequencies if 4 MHz for fast mode*/
  I2C_OARL = (address << 4);/*set address, when defining with GPIO register*/
  I2C_ITR_ITBUFEN=1U;/*TXE==1||RXNE==1 generates Event interrupt*/
  I2C_ITR_ITERREN = 1U;/*interrupts enable*/

}
/******************/
static void write_packet(uint8_t pack){
  uart_recieve temp;
  switch(count_recieve){
  case 0:{
      temp.sig=pack;
      break;
  }
  case 1:{
      temp.dest_id=pack;
      break;
  }
  case 2:{
      temp.dest_id+=pack;
    break;
  }
  case 3:{
     temp.cmd=pack;
     break;
  }
  case 4:{
     temp.sz=pack;
     break;
  }
  default:{
    while(!OVERFLOW(count_recieve, 254U)){    /*while all data witout crc_tail not recieved, write data to array*/
      temp.data_ptr[count_recieve - 4U] = pack;   /*write value to array*/
   }
    break;
    }
  }
}
/*******************************************************************************/

int main(void){

  /*block of initialization*/

  clock_init();
  port_init();
  UART_init();
  I2C_init(addr_recognize());
  __enable_interrupt();
  return 0;
}

/*******************************************************************************/

/*block of interrupt*/

__interrupt void UART1_RXE(void)
     {
       ++count_recieve;          /*increment counter of recieve packet*/
       write_packet(UART1_DR);   /*write data to struct*/
     }
__interrupt void I2C_ADDR(void){
  asm("nop");
}