10.1.8.r113

[21:03:28:295] ␍␊
[21:03:28:295] U-Boot SPL 2019.10 (Mar 10 2020 - 10:57:31 +0100)␍␊
[21:03:28:328] DRAM:PLL = b0003500␍␊
[21:03:28:328] DRAM PHY PGSR0 = 20003d␍␊
[21:03:28:328] DRAM PHY DX0RSR0 = 0␍␊
[21:03:28:328] DRAM PHY DX1RSR0 = 0␍␊
[21:03:28:328] DRAM PHY DX2RSR0 = 0␍␊
[21:03:28:328] DRAM PHY DX3RSR0 = 0␍␊
[21:03:28:328] Error while initializing DRAM PHY!␍␊
[21:03:28:328] ␍␊
[21:03:28:416] resetting ...␍␊
[21:03:29:026] ␍␊
[21:03:29:026] U-Boot SPL 2019.10 (Mar 10 2020 - 10:57:31 +0100)␍␊
[21:03:29:033] DRAM:PLL = b0003500␍␊
[21:03:29:038] DRAM PHY PGSR0 = 20003d␍␊
[21:03:29:038] DRAM PHY DX0RSR0 = 0␍␊
[21:03:29:038] DRAM PHY DX1RSR0 = 0␍␊
[21:03:29:041] DRAM PHY DX2RSR0 = 0␍␊
[21:03:29:043] DRAM PHY DX3RSR0 = 0␍␊
[21:03:29:043] Error while initializing DRAM PHY!␍␊
[21:03:29:047] ␍␊
[21:03:29:147] resetting ...␍␊
[21:03:29:757] ␍␊
[21:03:29:761] U-Boot SPL 2019.10 (Mar 10 2020 - 10:57:31 +0100)␍␊
[21:03:29:764] DRAM:PLL = b0003500␍␊
[21:03:29:765] DRAM PHY PGSR0 = 20003d␍␊
[21:03:29:766] DRAM PHY DX0RSR0 = 0␍␊
[21:03:29:769] DRAM PHY DX1RSR0 = 0␍␊
[21:03:29:771] DRAM PHY DX2RSR0 = 0␍␊
[21:03:29:775] DRAM PHY DX3RSR0 = 0␍␊
[21:03:29:775] Error while initializing DRAM PHY!␍␊
[21:03:29:778] ␍␊
[21:03:30:239] resetting ...␍␊
[21:03:30:488] ␍␊
[21:03:30:488] U-Boot SPL 2019.10 (Mar 10 2020 - 10:57:31 +0100)␍␊
[21:03:30:496] DRAM:PLL = b0003500␍␊
[21:03:30:496] DRAM PHY PGSR0 = 20003d␍␊
[21:03:30:501] DRAM PHY DX0RSR0 = 0␍␊
[21:03:30:501] DRAM PHY DX1RSR0 = 0␍␊
[21:03:30:508] DRAM PHY DX2RSR0 = 0␍␊
[21:03:30:508] DRAM PHY DX3RSR0 = 0␍␊
[21:03:30:508] Error while initializing DRAM PHY!␍␊
[21:03:30:508] ␍␊
[21:03:30:608] resetting ...␍␊
[21:03:31:218] ␍␊
[21:03:31:225] U-Boot SPL 2019.10 (Mar 10 2020 - 10:57:31 +0100)␍␊
[21:03:31:225] DRAM:PLL = b0003500␍␊
[21:03:31:229] DRAM PHY PGSR0 = 20003d␍␊
[21:03:31:229] DRAM PHY DX0RSR0 = 0␍␊
[21:03:31:233] DRAM PHY DX1RSR0 = 0␍␊
[21:03:31:233] DRAM PHY DX2RSR0 = 0␍␊
[21:03:31:254] DRAM PHY DX3RSR0 = 0␍␊
[21:03:31:254] Error while initializing DRAM PHY!␍␊
[21:03:31:254] ␍␊
[21:03:31:339] resetting ...␍␊
[21:03:31:949] ␍␊
[21:03:31:957] U-Boot SPL 2019.10 (Mar 10 2020 - 10:57:31 +0100)␍␊
[21:03:31:957] DRAM:PLL = b0003500␍␊
[21:03:31:957] DRAM PHY PGSR0 = 20003d␍␊
[21:03:31:962] DRAM PHY DX0RSR0 = 0␍␊
[21:03:31:962] DRAM PHY DX1RSR0 = 0␍␊
[21:03:31:966] DRAM PHY DX2RSR0 = 0␍␊
[21:03:31:966] DRAM PHY DX3RSR0 = 0␍␊
[21:03:31:966] Error while initializing DRAM PHY!␍␊
[21:03:31:972] ␍␊
[21:03:32:070] resetting ...␍␊
[21:03:32:680] ␍␊
[21:03:32:688] U-Boot SPL 2019.10 (Mar 10 2020 - 10:57:31 +0100)␍␊
[21:03:32:688] DRAM:PLL = b0003500␍␊
[21:03:32:688] DRAM PHY PGSR0 = 20003d␍␊
[21:03:32:692] DRAM PHY DX0RSR0 = 0␍␊
[21:03:32:692] DRAM PHY DX1RSR0 = 0␍␊
[21:03:32:697] DRAM PHY DX2RSR0 = 0␍␊
[21:03:32:697] DRAM PHY DX3RSR0 = 0␍␊
[21:03:32:701] Error while initializing DRAM PHY!␍␊
[21:03:32:701] ␍␊
[21:03:32:800] resetting ...␍␊
[21:03:33:410] ␍␊
[21:03:33:419] U-Boot SPL 2019.10 (Mar 10 2020 - 10:57:31 +0100)␍␊
[21:03:33:419] DRAM:PLL = b0003500␍␊
[21:03:33:419] DRAM PHY PGSR0 = 20003d␍␊
[21:03:33:424] DRAM PHY DX0RSR0 = 0␍␊
[21:03:33:424] DRAM PHY DX1RSR0 = 0␍␊
[21:03:33:429] DRAM PHY DX2RSR0 = 0␍␊
[21:03:33:429] DRAM PHY DX3RSR0 = 0␍␊
[21:03:33:429] Error while initializing DRAM PHY!␍␊
[21:03:33:432] ␍␊
[21:03:33:531] resetting ...␍␊
[21:03:33:853] <break>