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  1. #define F_DDS            3200000uL            // DDS base frequency
  2. #define DDS_CHANNELS     3                    // number of DDS channels
  3. #define DDS_WAVE_BITS    10                   // number of bits in waveform buffer
  4. #define DDS_WAVE_SAMPLES (1 << DDS_WAVE_BITS) // number of waveform samples
  5. #define DDS_OUT_BITS     9                    // number of bits in waveform buffer
  6. #define DDS_OUT_SAMPLES  (1 << DDS_OUT_BITS)  // number of samples in output buffer
  7. #define DDS_SHIFT        (32 - DDS_WAVE_BITS)
  8. #define DAC_OUT_MAX      4095                 // DAC maximum level
  9.  
  10. enum { DDS_FORM_SINE, DDS_FORM_SQR, DDS_FORM_PWM, DDS_FORM_TRI, DDS_FORM_SAW1, DDS_FORM_SAW2, DDS_FORM_DC, DDS_FORM_USER1, DDS_FORM_USER2, DDS_FORM_USER3, DDS_FORM_USER4, DDS_FORM_LAST };
  11.  
  12. struct dds_struct {
  13.     // current table pointer, user wave table, output samples
  14.     u16 *wave, table[DDS_WAVE_SAMPLES], out[DDS_OUT_SAMPLES];
  15.     struct {
  16.         u32 acc, inc, add;
  17.     } phase;
  18.     u32 form, pwm, amp;   // current wave form, PWM duty, amplitude
  19.     u64 f,ph;             // real frequency, phase
  20.     struct {
  21.         u8 chn, form, f, ph, pwm;
  22.     } update;
  23. } __attribute__((aligned(2),packed));
  24.  
  25. inline u32 dds_sync(){ return gpio_get(GPIOA,3); }
  26.  
  27. struct dds_struct dds[DDS_CHANNELS];
  28.  
  29. const u16 table_sine[DDS_WAVE_SAMPLES] = {
  30.     2048, 2061, 2073, 2086, 2098, 2111, 2123, 2136, 2148, 2161, 2174, 2186, 2199, 2211, 2224, 2236, 2249, 2261, 2274, 2286, 2299, 2311, 2323, 2336, 2348, 2361, 2373, 2386, 2398, 2410, 2423, 2435,
  31.     2447, 2460, 2472, 2484, 2497, 2509, 2521, 2533, 2545, 2558, 2570, 2582, 2594, 2606, 2618, 2630, 2642, 2654, 2666, 2678, 2690, 2702, 2714, 2726, 2738, 2749, 2761, 2773, 2785, 2796, 2808, 2820,
  32.     2831, 2843, 2855, 2866, 2878, 2889, 2900, 2912, 2923, 2935, 2946, 2957, 2968, 2980, 2991, 3002, 3013, 3024, 3035, 3046, 3057, 3068, 3079, 3090, 3100, 3111, 3122, 3133, 3143, 3154, 3164, 3175,
  33.     3185, 3196, 3206, 3216, 3227, 3237, 3247, 3257, 3267, 3277, 3287, 3297, 3307, 3317, 3327, 3337, 3347, 3356, 3366, 3376, 3385, 3395, 3404, 3413, 3423, 3432, 3441, 3450, 3459, 3469, 3478, 3487,
  34.     3495, 3504, 3513, 3522, 3531, 3539, 3548, 3556, 3565, 3573, 3581, 3590, 3598, 3606, 3614, 3622, 3630, 3638, 3646, 3654, 3662, 3669, 3677, 3685, 3692, 3700, 3707, 3714, 3722, 3729, 3736, 3743,
  35.     3750, 3757, 3764, 3771, 3777, 3784, 3791, 3797, 3804, 3810, 3817, 3823, 3829, 3835, 3841, 3847, 3853, 3859, 3865, 3871, 3876, 3882, 3888, 3893, 3898, 3904, 3909, 3914, 3919, 3924, 3929, 3934,
  36.     3939, 3944, 3949, 3953, 3958, 3962, 3967, 3971, 3975, 3980, 3984, 3988, 3992, 3996, 3999, 4003, 4007, 4010, 4014, 4017, 4021, 4024, 4027, 4031, 4034, 4037, 4040, 4042, 4045, 4048, 4051, 4053,
  37.     4056, 4058, 4060, 4063, 4065, 4067, 4069, 4071, 4073, 4075, 4076, 4078, 4080, 4081, 4083, 4084, 4085, 4086, 4087, 4088, 4089, 4090, 4091, 4092, 4093, 4093, 4094, 4094, 4094, 4095, 4095, 4095,
  38.     4095, 4095, 4095, 4095, 4094, 4094, 4094, 4093, 4093, 4092, 4091, 4090, 4089, 4088, 4087, 4086, 4085, 4084, 4083, 4081, 4080, 4078, 4076, 4075, 4073, 4071, 4069, 4067, 4065, 4063, 4060, 4058,
  39.     4056, 4053, 4051, 4048, 4045, 4042, 4040, 4037, 4034, 4031, 4027, 4024, 4021, 4017, 4014, 4010, 4007, 4003, 3999, 3996, 3992, 3988, 3984, 3980, 3975, 3971, 3967, 3962, 3958, 3953, 3949, 3944,
  40.     3939, 3934, 3929, 3924, 3919, 3914, 3909, 3904, 3898, 3893, 3888, 3882, 3876, 3871, 3865, 3859, 3853, 3847, 3841, 3835, 3829, 3823, 3817, 3810, 3804, 3797, 3791, 3784, 3777, 3771, 3764, 3757,
  41.     3750, 3743, 3736, 3729, 3722, 3714, 3707, 3700, 3692, 3685, 3677, 3669, 3662, 3654, 3646, 3638, 3630, 3622, 3614, 3606, 3598, 3590, 3581, 3573, 3565, 3556, 3548, 3539, 3531, 3522, 3513, 3504,
  42.     3495, 3487, 3478, 3469, 3459, 3450, 3441, 3432, 3423, 3413, 3404, 3395, 3385, 3376, 3366, 3356, 3347, 3337, 3327, 3317, 3307, 3297, 3287, 3277, 3267, 3257, 3247, 3237, 3227, 3216, 3206, 3196,
  43.     3185, 3175, 3164, 3154, 3143, 3133, 3122, 3111, 3100, 3090, 3079, 3068, 3057, 3046, 3035, 3024, 3013, 3002, 2991, 2980, 2968, 2957, 2946, 2935, 2923, 2912, 2900, 2889, 2878, 2866, 2855, 2843,
  44.     2831, 2820, 2808, 2796, 2785, 2773, 2761, 2749, 2738, 2726, 2714, 2702, 2690, 2678, 2666, 2654, 2642, 2630, 2618, 2606, 2594, 2582, 2570, 2558, 2545, 2533, 2521, 2509, 2497, 2484, 2472, 2460,
  45.     2447, 2435, 2423, 2410, 2398, 2386, 2373, 2361, 2348, 2336, 2323, 2311, 2299, 2286, 2274, 2261, 2249, 2236, 2224, 2211, 2199, 2186, 2174, 2161, 2148, 2136, 2123, 2111, 2098, 2086, 2073, 2061,
  46.     2048, 2035, 2023, 2010, 1998, 1985, 1973, 1960, 1948, 1935, 1922, 1910, 1897, 1885, 1872, 1860, 1847, 1835, 1822, 1810, 1797, 1785, 1773, 1760, 1748, 1735, 1723, 1710, 1698, 1686, 1673, 1661,
  47.     1649, 1636, 1624, 1612, 1599, 1587, 1575, 1563, 1551, 1538, 1526, 1514, 1502, 1490, 1478, 1466, 1454, 1442, 1430, 1418, 1406, 1394, 1382, 1370, 1358, 1347, 1335, 1323, 1311, 1300, 1288, 1276,
  48.     1265, 1253, 1241, 1230, 1218, 1207, 1196, 1184, 1173, 1161, 1150, 1139, 1128, 1116, 1105, 1094, 1083, 1072, 1061, 1050, 1039, 1028, 1017, 1006,  996,  985,  974,  963,  953,  942,  932,  921,
  49.      911,  900,  890,  880,  869,  859,  849,  839,  829,  819,  809,  799,  789,  779,  769,  759,  749,  740,  730,  720,  711,  701,  692,  683,  673,  664,  655,  646,  637,  627,  618,  609,
  50.      601,  592,  583,  574,  565,  557,  548,  540,  531,  523,  515,  506,  498,  490,  482,  474,  466,  458,  450,  442,  434,  427,  419,  411,  404,  396,  389,  382,  374,  367,  360,  353,
  51.      346,  339,  332,  325,  319,  312,  305,  299,  292,  286,  279,  273,  267,  261,  255,  249,  243,  237,  231,  225,  220,  214,  208,  203,  198,  192,  187,  182,  177,  172,  167,  162,
  52.      157,  152,  147,  143,  138,  134,  129,  125,  121,  116,  112,  108,  104,  100,   97,   93,   89,   86,   82,   79,   75,   72,   69,   65,   62,   59,   56,   54,   51,   48,   45,   43,
  53.       40,   38,   36,   33,   31,   29,   27,   25,   23,   21,   20,   18,   16,   15,   13,   12,   11,   10,    9,    8,    7,    6,    5,    4,    3,    3,    2,    2,    2,    1,    1,    1,
  54.        1,    1,    1,    1,    2,    2,    2,    3,    3,    4,    5,    6,    7,    8,    9,   10,   11,   12,   13,   15,   16,   18,   20,   21,   23,   25,   27,   29,   31,   33,   36,   38,
  55.       40,   43,   45,   48,   51,   54,   56,   59,   62,   65,   69,   72,   75,   79,   82,   86,   89,   93,   97,  100,  104,  108,  112,  116,  121,  125,  129,  134,  138,  143,  147,  152,
  56.      157,  162,  167,  172,  177,  182,  187,  192,  198,  203,  208,  214,  220,  225,  231,  237,  243,  249,  255,  261,  267,  273,  279,  286,  292,  299,  305,  312,  319,  325,  332,  339,
  57.      346,  353,  360,  367,  374,  382,  389,  396,  404,  411,  419,  427,  434,  442,  450,  458,  466,  474,  482,  490,  498,  506,  515,  523,  531,  540,  548,  557,  565,  574,  583,  592,
  58.      601,  609,  618,  627,  637,  646,  655,  664,  673,  683,  692,  701,  711,  720,  730,  740,  749,  759,  769,  779,  789,  799,  809,  819,  829,  839,  849,  859,  869,  880,  890,  900,
  59.      911,  921,  932,  942,  953,  963,  974,  985,  996, 1006, 1017, 1028, 1039, 1050, 1061, 1072, 1083, 1094, 1105, 1116, 1128, 1139, 1150, 1161, 1173, 1184, 1196, 1207, 1218, 1230, 1241, 1253,
  60.     1265, 1276, 1288, 1300, 1311, 1323, 1335, 1347, 1358, 1370, 1382, 1394, 1406, 1418, 1430, 1442, 1454, 1466, 1478, 1490, 1502, 1514, 1526, 1538, 1551, 1563, 1575, 1587, 1599, 1612, 1624, 1636,
  61.     1649, 1661, 1673, 1686, 1698, 1710, 1723, 1735, 1748, 1760, 1773, 1785, 1797, 1810, 1822, 1835, 1847, 1860, 1872, 1885, 1897, 1910, 1922, 1935, 1948, 1960, 1973, 1985, 1998, 2010, 2023, 2035,
  62. };
  63.  
  64. void dds_setup(){
  65.     // PA3 - Sync
  66.     gpio_mode1(GPIOA, GPIO_MODE_INPUT,  3);
  67.     gpio_pupd1(GPIOA, GPIO_PULLUP,      3);
  68.     // PA4-6 - DACs
  69.     gpio_mode3(GPIOA, GPIO_MODE_ANALOG, 4,5,6);
  70.     gpio_pupd3(GPIOA, GPIO_NOPULL,      4,5,6);
  71.  
  72.     // DACs
  73.     __DAC1_CLK_ENABLE(); __DAC2_CLK_ENABLE();
  74.     DAC1->CR = DAC_CR_TSEL1 | DAC_CR_TSEL2 | DAC_CR_EN1 | DAC_CR_EN2 | DAC_CR_BOFF2 | (config.params.s.buf ? 0 : DAC_CR_BOFF1);
  75.     DAC2->CR = DAC_CR_TSEL1 | DAC_CR_TSEL2 | DAC_CR_EN1 | DAC_CR_EN2 | DAC_CR_BOFF1 | DAC_CR_BOFF2;
  76.  
  77.     // Timer
  78.     __TIM1_CLK_ENABLE();
  79.     TIM_HandleTypeDef timh;
  80.     timh.Instance               = TIM1;
  81.     timh.Init.Prescaler         = 0;
  82.     timh.Init.Period            = F_CPU / F_DDS - 1;
  83.     timh.Init.ClockDivision     = 1; //TIM_CLOCKDIVISION_DIV1;
  84.     timh.Init.CounterMode       = TIM_COUNTERMODE_UP;
  85.     timh.Init.RepetitionCounter = 0;
  86.     HAL_TIM_Base_Init(&timh);
  87.     TIM1->CR1  &= ~TIM_CR1_CEN;
  88.     TIM1->CCR1  = TIM1->CCR2 = TIM1->CCR3 = F_CPU / F_DDS - 1;
  89.     TIM1->DIER |= TIM_DIER_CC1DE | TIM_DIER_CC2DE | TIM_DIER_CC3DE;
  90.  
  91.     // DMA
  92.     __DMA1_CLK_ENABLE();
  93.  
  94.     DMA_HandleTypeDef dmah12;
  95.     dmah12.Instance                 = DMA1_Channel2;
  96.     dmah12.Init.Direction           = DMA_MEMORY_TO_PERIPH;
  97.     dmah12.Init.MemDataAlignment    = DMA_MDATAALIGN_HALFWORD;
  98.     dmah12.Init.MemInc              = DMA_MINC_ENABLE;
  99.     dmah12.Init.Mode                = DMA_CIRCULAR;
  100.     dmah12.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
  101.     dmah12.Init.PeriphInc           = DMA_PINC_DISABLE;
  102.     dmah12.Init.Priority            = DMA_PRIORITY_VERY_HIGH;
  103.     HAL_DMA_Init(&dmah12);
  104.     HAL_NVIC_SetPriority(DMA1_Channel2_IRQn, 0, 0);
  105.     HAL_NVIC_EnableIRQ(DMA1_Channel2_IRQn);
  106.     HAL_DMA_Start_IT(&dmah12, (u32)&dds[0].out, (u32)&DAC1->DHR12R1, DDS_OUT_SAMPLES);
  107.  
  108.     DMA_HandleTypeDef dmah13;
  109.     dmah13.Instance                 = DMA1_Channel3;
  110.     dmah13.Init.Direction           = DMA_MEMORY_TO_PERIPH;
  111.     dmah13.Init.MemDataAlignment    = DMA_MDATAALIGN_HALFWORD;
  112.     dmah13.Init.MemInc              = DMA_MINC_ENABLE;
  113.     dmah13.Init.Mode                = DMA_CIRCULAR;
  114.     dmah13.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
  115.     dmah13.Init.PeriphInc           = DMA_PINC_DISABLE;
  116.     dmah13.Init.Priority            = DMA_PRIORITY_VERY_HIGH;
  117.     HAL_DMA_Init(&dmah13);
  118.     HAL_DMA_Start(&dmah13, (u32)&dds[1].out, (u32)&DAC1->DHR12R2, DDS_OUT_SAMPLES);
  119.  
  120.     DMA_HandleTypeDef dmah16;
  121.     dmah16.Instance                 = DMA1_Channel6;
  122.     dmah16.Init.Direction           = DMA_MEMORY_TO_PERIPH;
  123.     dmah16.Init.MemDataAlignment    = DMA_MDATAALIGN_HALFWORD;
  124.     dmah16.Init.MemInc              = DMA_MINC_ENABLE;
  125.     dmah16.Init.Mode                = DMA_CIRCULAR;
  126.     dmah16.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
  127.     dmah16.Init.PeriphInc           = DMA_PINC_DISABLE;
  128.     dmah16.Init.Priority            = DMA_PRIORITY_VERY_HIGH;
  129.     HAL_DMA_Init(&dmah16);
  130.     HAL_DMA_Start(&dmah16, (u32)&dds[2].out, (u32)&DAC2->DHR12R1, DDS_OUT_SAMPLES);
  131.  
  132.     // update all channels
  133.     for (u8 i=0; i<DDS_CHANNELS; i++){
  134.         dds[i].wave = &dds[i].table[0];
  135.         dds[i].update.form = dds[i].update.f = dds[i].update.ph = dds[i].update.pwm = 1;
  136.     }
  137.  
  138.     // start main timer
  139.     TIM1->CR1 |= TIM_CR1_CEN;
  140.  
  141.     ptx_add(dds_thread, NULL, PTX_RUN);
  142. }
  143.  
  144. void handler_IRQ_DMA1_Channel2(){
  145.     u16 *out1,*out2,*out3, *wave1,*wave2,*wave3;
  146.  
  147.     // load pointers to out buffers
  148.     if (DMA1->ISR & DMA_FLAG_HT2){ out1 = &dds[0].out[0]; out2 = &dds[1].out[0]; out3 = &dds[2].out[0];
  149.     } else if (DMA1->ISR & DMA_FLAG_TC2){ out1 = &dds[0].out[DDS_OUT_SAMPLES / 2]; out2 = &dds[1].out[DDS_OUT_SAMPLES / 2]; out3 = &dds[2].out[DDS_OUT_SAMPLES / 2]; }
  150.  
  151.     // clear DMA flags
  152.     DMA1->IFCR = DMA_IFCR_CHTIF2 | DMA_IFCR_CTCIF2;// | DMA_IFCR_CTEIF2;
  153.  
  154.     // synchronize accumulators
  155.     if (config.params.s.sync) config.params.s.sync = dds[0].phase.acc = dds[1].phase.acc = dds[2].phase.acc = 0;
  156.  
  157.     // cache phase/increment
  158.     u32 acc1 = dds[0].phase.acc + dds[0].phase.add; u32 inc1 = dds[0].phase.inc;
  159.     u32 acc2 = dds[1].phase.acc + dds[1].phase.add; u32 inc2 = config.params.s.all_freq1 ? dds[0].phase.inc : dds[1].phase.inc;
  160.     u32 acc3 = dds[2].phase.acc + dds[2].phase.add; u32 inc3 = config.params.s.all_freq1 ? dds[0].phase.inc : dds[2].phase.inc;
  161.  
  162.     // load pointers to wavetables
  163.     if (config.params.s.all_form1) wave1 = wave2 = wave3 = dds[0].wave;
  164.     else { wave1 = dds[0].wave; wave2 = dds[1].wave; wave3 = dds[2].wave; }
  165.  
  166.     // update out buffers
  167.     for (u32 i=(DDS_OUT_SAMPLES / 64); i--; ){
  168.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  169.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  170.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  171.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  172.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  173.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  174.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  175.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  176.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  177.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  178.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  179.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  180.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  181.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  182.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  183.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  184.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  185.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  186.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  187.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  188.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  189.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  190.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  191.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  192.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  193.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  194.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  195.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  196.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  197.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  198.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  199.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  200.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  201.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  202.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  203.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  204.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  205.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  206.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  207.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  208.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  209.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  210.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  211.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  212.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  213.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  214.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  215.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  216.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  217.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  218.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  219.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  220.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  221.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  222.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  223.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  224.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  225.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  226.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  227.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  228.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  229.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  230.         *out1++ = wave1[acc1 >> DDS_SHIFT]; *out2++ = wave2[acc2 >> DDS_SHIFT];
  231.         *out3++ = wave3[acc3 >> DDS_SHIFT]; acc1 += inc1; acc2 += inc2; acc3 += inc3;
  232.     }
  233.  
  234.     // store current accumulators
  235.     dds[0].phase.acc = acc1 - dds[0].phase.add;
  236.     dds[1].phase.acc = acc2 - dds[1].phase.add;
  237.     dds[2].phase.acc = acc3 - dds[2].phase.add;
  238. }
  239.  
  240. u8 dds_chn, sync_prev;
  241. PT_THREAD( dds_thread( struct pt *pt, struct ptx *ptx ) ) {
  242.     PT_BEGIN(pt);
  243.  
  244.     while (1) {
  245.         PT_YIELD(pt);
  246.  
  247.         // update Sync input
  248.         u32 sync = !!dds_sync();
  249.         if (!sync && sync_prev){
  250.             cli();
  251.             dds[0].phase.acc = dds[1].phase.acc = dds[2].phase.acc = 0;
  252.             sei();
  253.         }
  254.         sync_prev = sync;
  255.  
  256.         // update DDS parameters
  257.         for (dds_chn=0; dds_chn<DDS_CHANNELS; dds_chn++){
  258.             // update waveform
  259.             if (dds[dds_chn].update.form){
  260.                 if (config.params.s.dc[dds_chn] >= 0){
  261.                     u16 dac = config.params.s.dc[dds_chn] * (u32)DAC_OUT_MAX / 100;
  262.                     for (u32 i=0; i<DDS_WAVE_SAMPLES; i++) dds[dds_chn].table[i] = dac;
  263.                 } else {
  264.                     switch (config.params.s.form[dds_chn]){
  265.                         case DDS_FORM_SINE:
  266.                             for (u32 i=0; i<DDS_WAVE_SAMPLES; i++)
  267.                                 dds[dds_chn].table[i] = config.params.s.inv[dds_chn] ? (DAC_OUT_MAX - table_sine[i]) : table_sine[i];
  268.                             break;
  269.                         case DDS_FORM_SQR:
  270.                             for (u32 i=0; i<DDS_WAVE_SAMPLES; i++){
  271.                                 u16 s = (i < DDS_WAVE_SAMPLES/2) ? 0 : DAC_OUT_MAX;
  272.                                 dds[dds_chn].table[i] = config.params.s.inv[dds_chn] ? (DAC_OUT_MAX - s) : s;
  273.                             }
  274.                             break;
  275.                         case DDS_FORM_PWM:
  276.                             dds[dds_chn].update.pwm = 1;
  277.                             break;
  278.                         case DDS_FORM_TRI: {
  279.                             u16 w = 0;
  280.                             for (u32 i=0; i<DDS_WAVE_SAMPLES/2; i++,w+=((DAC_OUT_MAX+1)/(DDS_WAVE_SAMPLES/2)))
  281.                                 dds[dds_chn].table[i] = config.params.s.inv[dds_chn] ? (DAC_OUT_MAX - w) : w;
  282.                             for (u32 i=DDS_WAVE_SAMPLES/2; i<DDS_WAVE_SAMPLES; i++,w-=((DAC_OUT_MAX+1)/(DDS_WAVE_SAMPLES/2)))
  283.                                 dds[dds_chn].table[i] = config.params.s.inv[dds_chn] ? (DAC_OUT_MAX - w) : w;
  284.                             break;
  285.                         }
  286.                         case DDS_FORM_SAW1: {
  287.                             u16 w = 0;
  288.                             for (u32 i=0; i<DDS_WAVE_SAMPLES; i++,w+=((DAC_OUT_MAX+1)/DDS_WAVE_SAMPLES))
  289.                                 dds[dds_chn].table[i] = config.params.s.inv[dds_chn] ? (DAC_OUT_MAX - w) : w;
  290.                             break;
  291.                         }
  292.                         case DDS_FORM_SAW2: {
  293.                             u16 w = DAC_OUT_MAX;
  294.                             for (u32 i=0; i<DDS_WAVE_SAMPLES; i++,w-=((DAC_OUT_MAX+1)/DDS_WAVE_SAMPLES))
  295.                                 dds[dds_chn].table[i] = config.params.s.inv[dds_chn] ? (DAC_OUT_MAX - w) : w;
  296.                             break;
  297.                         }
  298.                         case DDS_FORM_DC:
  299.                             dds[dds_chn].update.pwm = 1;
  300.                             break;
  301.                         case DDS_FORM_USER1:
  302.                             break;
  303.                         case DDS_FORM_USER2:
  304.                             break;
  305.                         case DDS_FORM_USER3:
  306.                             break;
  307.                         case DDS_FORM_USER4:
  308.                             break;
  309.                     }
  310.                 }
  311.                 dds[dds_chn].update.form = 0;
  312.                 PT_YIELD(pt);
  313.             }
  314.  
  315.             // update frequency
  316.             if (dds[dds_chn].update.f){
  317.                 dds[dds_chn].phase.inc = 0x100000000uLL * config.set.s.f[dds_chn] / F_DDS / 1000uLL;
  318.                 dds[dds_chn].update.f = 0;
  319.                 PT_YIELD(pt);
  320.             }
  321.  
  322.             // update phase
  323.             if (dds[dds_chn].update.ph){
  324.                 dds[dds_chn].phase.add = config.set.s.ph[dds_chn] * 0xFFFFFFFFuLL / 359999uLL;
  325.                 dds[dds_chn].update.ph = 0;
  326.                 PT_YIELD(pt);
  327.             }
  328.  
  329.             // update PWM
  330.             if (dds[dds_chn].update.pwm){
  331.                 if (config.params.s.form[dds_chn] == DDS_FORM_PWM){
  332.                     u16 pwm = config.set.s.pwm[dds_chn] * DDS_WAVE_SAMPLES / 100000uL;
  333.                     for (u32 i=0; i<DDS_WAVE_SAMPLES; i++){
  334.                         u16 s = (i < pwm) ? DAC_OUT_MAX : 0;
  335.                         dds[dds_chn].table[i] = config.params.s.inv[dds_chn] ? (DAC_OUT_MAX - s) : s;
  336.                     }
  337.                     dds[dds_chn].update.pwm = 0;
  338.                     PT_YIELD(pt);
  339.                 }
  340.                 else if (config.params.s.form[dds_chn] == DDS_FORM_DC){
  341.                     u16 dc = config.set.s.pwm[dds_chn] * DAC_OUT_MAX / 100000uL;
  342.                     for (u32 i=0; i<DDS_WAVE_SAMPLES; i++) dds[dds_chn].table[i] = config.params.s.inv[dds_chn] ? (DAC_OUT_MAX - dc) : dc;
  343.                 }
  344.             }
  345.  
  346.         }
  347.     }
  348.  
  349.     PT_END(pt);
  350.     return PT_ENDED;
  351. }
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