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Switches_To_LEDs_TOP

Jun 18th, 2020
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VHDL 4.23 KB | None | 0 0
  1. library ieee;
  2. use ieee.std_logic_1164.all;
  3. use ieee.numeric_std.all;
  4. use work.func_lib.all;
  5.  
  6. entity Switches_To_LEDs is
  7.     port (
  8.     -- Clock
  9.     i_Clk : in std_logic;
  10.     -- Push-Button Switches:
  11.     i_Switch_1 : in std_logic;
  12.     i_Switch_2 : in std_logic;
  13.     i_Switch_3 : in std_logic;
  14.     i_Switch_4 : in std_logic;
  15.     i_Switch_5 : in std_logic;
  16.     i_Switch_6 : in std_logic;
  17.     i_Switch_7 : in std_logic;
  18.     i_Switch_8 : in std_logic;
  19.    
  20.     -- LED Pins:
  21.     o_LED_1 : out std_logic;
  22.     o_LED_2 : out std_logic;
  23.     o_LED_3 : out std_logic;
  24.     o_LED_4 : out std_logic;
  25.     o_LED_5 : out std_logic;
  26.     o_LED_6 : out std_logic;
  27.     o_LED_7 : out std_logic;
  28.     o_LED_8 : out std_logic;
  29.    
  30.     -- 7-Segment:
  31.     o_Segment3_A : out std_logic;
  32.     o_Segment3_B : out std_logic;
  33.     o_Segment3_C : out std_logic;
  34.     o_Segment3_D : out std_logic;
  35.     o_Segment3_E : out std_logic;
  36.     o_Segment3_F : out std_logic;
  37.     o_Segment3_G : out std_logic;
  38.     o_Segment3_DP : out std_logic;
  39.    
  40.     o_Segment2_A : out std_logic;
  41.     o_Segment2_B : out std_logic;
  42.     o_Segment2_C : out std_logic;
  43.     o_Segment2_D : out std_logic;
  44.     o_Segment2_E : out std_logic;
  45.     o_Segment2_F : out std_logic;
  46.     o_Segment2_G : out std_logic;
  47.     o_Segment2_DP : out std_logic
  48.     );
  49. end entity Switches_To_LEDs;
  50.  
  51. architecture RTL of Switches_To_LEDs is
  52.    
  53.     signal w_decode0 : std_logic_vector(7 downto 0) := (others => '0');
  54.     signal w_decode1 : std_logic_vector(7 downto 0) := (others => '0');
  55.     signal w_segment0 : integer range 0 to 15 := 0;
  56.     signal w_segment1 : integer range 0 to 15 := 0;
  57.    
  58.     signal delay : integer range 0 to 12000000 := 0;
  59.    
  60.     signal w_switch_1 : std_logic;
  61.     signal w_switch_2 : std_logic;
  62.     signal w_switch_3 : std_logic;
  63.     signal w_switch_4 : std_logic;
  64.     signal w_switch_5 : std_logic;
  65.     signal w_switch_6 : std_logic;
  66.     signal w_switch_7 : std_logic;
  67.     signal w_switch_8 : std_logic;
  68.    
  69. begin
  70.  
  71.     Debounce_1 : entity work.Debounce_Switch
  72.     port map (
  73.         i_clk => i_Clk,
  74.         i_Switch => i_Switch_1,
  75.         o_Switch => w_switch_1
  76.     );
  77.    
  78.    
  79.     Debounce_2 : entity work.Debounce_Switch
  80.     port map (
  81.         i_clk => i_Clk,
  82.         i_Switch => i_Switch_2,
  83.         o_Switch => w_switch_2
  84.     );
  85.    
  86.     Debounce_3 : entity work.Debounce_Switch
  87.     port map (
  88.         i_clk => i_Clk,
  89.         i_Switch => i_Switch_3,
  90.         o_Switch => w_switch_3
  91.     );
  92.    
  93.     Debounce_4 : entity work.Debounce_Switch
  94.     port map (
  95.         i_clk => i_Clk,
  96.         i_Switch => i_Switch_4,
  97.         o_Switch => w_switch_4
  98.     );
  99.    
  100.     Debounce_5 : entity work.Debounce_Switch
  101.     port map (
  102.         i_clk => i_Clk,
  103.         i_Switch => i_Switch_5,
  104.         o_Switch => w_switch_5
  105.     );
  106.    
  107.     Debounce_6 : entity work.Debounce_Switch
  108.     port map (
  109.         i_clk => i_Clk,
  110.         i_Switch => i_Switch_6,
  111.         o_Switch => w_switch_6
  112.     );
  113.    
  114.     Debounce_7 : entity work.Debounce_Switch
  115.     port map (
  116.         i_clk => i_Clk,
  117.         i_Switch => i_Switch_7,
  118.         o_Switch => w_switch_7
  119.     );
  120.    
  121.     Debounce_8 : entity work.Debounce_Switch
  122.     port map (
  123.         i_clk => i_Clk,
  124.         i_Switch => i_Switch_8,
  125.         o_Switch => w_switch_8
  126.     );
  127.  
  128.     o_LED_1 <= w_switch_1;
  129.     o_LED_2 <= w_switch_2;
  130.     o_LED_3 <= w_Switch_3; 
  131.     o_LED_4 <= w_Switch_4;
  132.     o_LED_5 <= w_Switch_5;
  133.     o_LED_6 <= w_Switch_6;
  134.     o_LED_7 <= w_Switch_7; 
  135.     o_LED_8 <= w_Switch_8;
  136.  
  137.     -- 7-Segment count
  138.     -- synchronous process, asynchronous reset
  139.     seg_count : process (i_Clk) is
  140.     begin
  141.         if rising_edge(i_Clk) then
  142.             if w_Switch_7 = '1' then
  143.                 w_segment0 <= 0;
  144.                 w_segment1 <= 0;
  145.             else
  146.                 delay <= delay + 1;
  147.                 if  delay = 12000000 then
  148.                     w_segment0 <= w_segment0 + 1;
  149.                     if w_segment0 = 15 then
  150.                         w_segment1 <= w_segment1 + 1;
  151.                     end if;
  152.                 end if;
  153.             end if;
  154.         end if;
  155.     end process seg_count;
  156.    
  157.     -- 7-Segment decode
  158.     -- asynchronous process
  159.     seg_decode : process (w_segment0, w_segment1) is
  160.     begin
  161.         w_decode0 <= f_hex_seg(w_segment0);
  162.         w_decode1 <= f_hex_seg(w_segment1);
  163.     end process seg_decode;
  164.    
  165.     o_Segment3_A <= w_decode0(6);
  166.     o_Segment3_B <= w_decode0(5);
  167.     o_Segment3_C <= w_decode0(4);
  168.     o_Segment3_D <= w_decode0(3);
  169.     o_Segment3_E <= w_decode0(2);
  170.     o_Segment3_F <= w_decode0(1);
  171.     o_Segment3_G <= w_decode0(0);
  172.    
  173.     o_Segment2_A <= w_decode1(6);
  174.     o_Segment2_B <= w_decode1(5);
  175.     o_Segment2_C <= w_decode1(4);
  176.     o_Segment2_D <= w_decode1(3);
  177.     o_Segment2_E <= w_decode1(2);
  178.     o_Segment2_F <= w_decode1(1);
  179.     o_Segment2_G <= w_decode1(0);
  180.  
  181. end RTL;
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