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STM8L152C6 ADC tests

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Oct 12th, 2017
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  1. // Source code under CC0 1.0
  2. #include <stdint.h>
  3. #include <stdio.h>
  4.  
  5. #define EVER (;;)
  6.  
  7. //Definitions for IO Ports
  8. #define PA_ODR          (*(volatile uint8_t *)0x5000)
  9. #define PA_IDR          (*(volatile uint8_t *)0x5001)
  10. #define PA_DDR          (*(volatile uint8_t *)0x5002)
  11. #define PA_CR1          (*(volatile uint8_t *)0x5003)
  12. #define PA_CR2          (*(volatile uint8_t *)0x5004)
  13.  
  14. #define PB_ODR          (*(volatile uint8_t *)0x5005)
  15. #define PB_IDR          (*(volatile uint8_t *)0x5006)
  16. #define PB_DDR          (*(volatile uint8_t *)0x5007)
  17. #define PB_CR1          (*(volatile uint8_t *)0x5008)
  18. #define PB_CR2          (*(volatile uint8_t *)0x5009)
  19.  
  20. #define PC_ODR          (*(volatile uint8_t *)0x500A)
  21. #define PC_IDR          (*(volatile uint8_t *)0x500B)
  22. #define PC_DDR          (*(volatile uint8_t *)0x500C)
  23. #define PC_CR1          (*(volatile uint8_t *)0x500D)
  24. #define PC_CR2          (*(volatile uint8_t *)0x500E)
  25.  
  26. #define PD_ODR          (*(volatile uint8_t *)0x500F)
  27. #define PD_IDR          (*(volatile uint8_t *)0x5010)
  28. #define PD_DDR          (*(volatile uint8_t *)0x5011)
  29. #define PD_CR1          (*(volatile uint8_t *)0x5012)
  30. #define PD_CR2          (*(volatile uint8_t *)0x5013)
  31.  
  32. #define PE_ODR          (*(volatile uint8_t *)0x5014)
  33. #define PE_IDR          (*(volatile uint8_t *)0x5015)
  34. #define PE_DDR          (*(volatile uint8_t *)0x5016)
  35. #define PE_CR1          (*(volatile uint8_t *)0x5017)
  36. #define PE_CR2          (*(volatile uint8_t *)0x5018)
  37.  
  38. #define PF_ODR          (*(volatile uint8_t *)0x5019)
  39. #define PF_IDR          (*(volatile uint8_t *)0x501A)
  40. #define PF_DDR          (*(volatile uint8_t *)0x501B)
  41. #define PF_CR1          (*(volatile uint8_t *)0x501C)
  42. #define PF_CR2          (*(volatile uint8_t *)0x501D)
  43.  
  44. //ADC Registers
  45. #define ADC1_CR1        (*(volatile uint8_t *)0x5340)
  46. #define ADC1_CR2        (*(volatile uint8_t *)0x5341)
  47. #define ADC1_CR3        (*(volatile uint8_t *)0x5342)
  48. #define ADC1_SR         (*(volatile uint8_t *)0x5343)
  49. #define ADC1_DRH        (*(volatile uint8_t *)0x5344)
  50. #define ADC1_DRL        (*(volatile uint8_t *)0x5345)
  51. #define ADC1_HTRH       (*(volatile uint8_t *)0x5346)
  52. #define ADC1_HTRL       (*(volatile uint8_t *)0x5347)
  53. #define ADC1_LTRH       (*(volatile uint8_t *)0x5348)
  54. #define ADC1_LRTR       (*(volatile uint8_t *)0x5349)
  55. #define ADC1_SQR1       (*(volatile uint8_t *)0x534A)
  56. #define ADC1_SQR2       (*(volatile uint8_t *)0x534B)
  57. #define ADC1_SQR3       (*(volatile uint8_t *)0x534C)
  58. #define ADC1_SQR4       (*(volatile uint8_t *)0x534D)
  59. #define ADC1_TRIGR1     (*(volatile uint8_t *)0x534E)
  60. #define ADC1_TRIGR2     (*(volatile uint8_t *)0x534F)
  61. #define ADC1_TRIGR3     (*(volatile uint8_t *)0x5350)
  62. #define ADC1_TRIGR4     (*(volatile uint8_t *)0x5351)
  63.  
  64. //ADC_CR1 Bits
  65. #define OVERIE          (1 << 7)    // Overrun interrupt enable
  66. #define RES_1           (1 << 6)    // Configurable resolution
  67. #define RES_0           (1 << 5)    // Configurable resolution
  68. #define AWDIE           (1 << 4)    // Analog watchdog interrupt enable
  69. #define EOCIE           (1 << 3)    // Interrupt enable for EOC
  70. #define CONT            (1 << 2)    // Continuous Conversion
  71. #define START           (1 << 1)    // Conversion Start
  72. #define ADON            (1 << 0)    // A/D converter ON / OFF
  73.  
  74. //ADC_CR3 Bits
  75. #define SMTP2_2         (1 << 7)
  76. #define SMTP2_1         (1 << 6)
  77. #define SMTP2_0         (1 << 5)
  78. #define CHSEL_4         (1 << 4)
  79. #define CHSEL_3         (1 << 3)
  80. #define CHSEL_2         (1 << 2)
  81. #define CHSEL_1         (1 << 1)
  82. #define CHSEL_0         (1 << 0)
  83.  
  84.  
  85. //System Configuration
  86. #define SYSCFG_RMPCR1   (*(volatile uint8_t *)0x509E)
  87. #define USART1TR_REMAP1 (1 << 5)
  88. #define USART1TR_REMAP0 (1 << 4)
  89.  
  90. //Clock
  91. #define CLK_DIVR        (*(volatile uint8_t *)0x50C0)
  92. #define CLK_PCKENR1     (*(volatile uint8_t *)0x50C3)
  93. #define CLK_PCKENR2     (*(volatile uint8_t *)0x50C4)
  94.  
  95. //USART
  96. #define USART1_SR       (*(volatile uint8_t *)0x5230)
  97. #define USART1_DR       (*(volatile uint8_t *)0x5231)
  98. #define USART1_BRR1     (*(volatile uint8_t *)0x5232)
  99. #define USART1_BRR2     (*(volatile uint8_t *)0x5233)
  100. #define USART1_CR2      (*(volatile uint8_t *)0x5235)
  101. #define USART1_CR3      (*(volatile uint8_t *)0x5236)
  102.  
  103. #define USART_CR2_TEN   (1 << 3)
  104. #define USART_CR3_STOP2 (1 << 5)
  105. #define USART_CR3_STOP1 (1 << 4)
  106. #define USART_SR_TXE    (1 << 7)
  107.  
  108.  
  109. //User Specific Definitions
  110. #define LED3            (1 << 7)
  111. #define LED4            (1 << 7)
  112.  
  113. // we need to provide putchar, as it is controller specific
  114. void putchar(char c)
  115. {
  116.     while(!(USART1_SR & USART_SR_TXE));
  117.  
  118.     USART1_DR = c;
  119. }
  120.  
  121. void uart_init(void)
  122. {
  123.     // Remap USART1 TX to PA2 and RX to PA4
  124.     SYSCFG_RMPCR1 |= USART1TR_REMAP0;
  125.     SYSCFG_RMPCR1 &= ~USART1TR_REMAP1;
  126.  
  127.     USART1_CR2 = USART_CR2_TEN; // Allow TX and RX
  128.     USART1_CR3 &= ~(USART_CR3_STOP1 | USART_CR3_STOP2); // 1 stop bit
  129.     USART1_BRR2 = 0x03; USART1_BRR1 = 0x68; // 9600 baud
  130. }
  131.  
  132. void LED_init(void)
  133. {
  134.     PE_DDR |= LED3;
  135.     PE_CR1 |= LED3;
  136.  
  137.     PC_DDR |= LED4;
  138.     PC_CR1 |= LED4;
  139. }
  140.  
  141. void ADC1_channel_select(uint8_t n)
  142. {
  143.     ADC1_CR3 &= ~(0x1F);      //reset selection
  144.     ADC1_CR3 |= (n & 0x1F); //set selection
  145. }
  146.  
  147. void main(void)
  148. {
  149.     unsigned long i = 0;
  150.  
  151.     CLK_DIVR = 0x00; // Set the frequency to 16 MHz
  152.     CLK_PCKENR1 |= 0xFF; //(1 << 5) & (1 << 7); // Enable peripherals UART & ADC
  153.     CLK_PCKENR2 |= (1 << 4); // enable DMA1
  154.  
  155.     uart_init();
  156.     LED_init();
  157.    
  158.     // switch on ADC1
  159.     ADC1_CR1 |= START;
  160.  
  161.     ADC1_SQR2 = (1 << 2); // select channel 18 (PB0)
  162.     ADC1_SQR3 = 0x00;
  163.     ADC1_SQR4 = 0x00;
  164.  
  165.     // set ADC1 resolution to 8 bit
  166.     ADC1_CR1 &= ~(1 << 5);
  167.     ADC1_CR1 |= (1 << 6);
  168.  
  169.     // start measurement for ADC1
  170.     ADC1_CR1 |= (1 << 2); //1 start, 2 cont
  171.     printf("Restarted...\r\n");
  172.  
  173.     for EVER
  174.     {
  175.         PE_ODR |= LED3;
  176.         printf("PC_IDR: %X\t CR1-3: %X %X %X %X Data: %X\r\n",PC_IDR, ADC1_CR1, ADC1_CR2, ADC1_CR3, ADC1_SR, ADC1_DRL);
  177.         printf("ADC SQR1-4: %X %X %X %X\r\n", ADC1_SQR1, ADC1_SQR2, ADC1_SQR3, ADC1_SQR4);
  178.         printf("CLK_PCKENR: %X %X\r\n", CLK_PCKENR1, CLK_PCKENR2);
  179.         PE_ODR &= ~LED3;
  180.         for(i = 0; i < 0xFFFFF; i++); // Sleep
  181.     }
  182. }
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