-- Author: Maksim Kazak
-- 12 variant
-- q11 = "001", q2 = "010", q3 = "100"
-- y1 = "001", y2 = "010", y3 = "100"

library ieee;
use ieee.std_logic_1164.all;

entity moore_machine is
  port (
    clock, reset: in std_logic;
    data_out: out std_logic_vector (2 downto 0);
    data_in: in std_logic_vector (2 downto 0)
  );
end moore_machine;

architecture behavioral1 of moore_machine is
  type state_values is (t1, t22, t3);
  signal pres_state, next_state: state_values;
begin

statereg: process (clock, reset)
begin
  if (reset = '0') then
    pres_state <= t1;
  elsif (clock'event and clock = '1') then
    pres_state <= next_state;
  end if;
end process statereg;

fsm: process (pres_state, data_in)
begin
  case pres_state is
    when t1 =>
      case data_in is
        when "001" => next_state <= t3;
        when "010" => next_state <= t22;
        when "100" => next_state <= t1;
        when others => next_state <= pres_state;
      end case;
    when t22 =>
      case data_in is
    when "001" => next_state <= t22;
        when "010" => next_state <= t1;
        when "100" => next_state <= t22;
        when others => next_state <= pres_state;
      end case;
    when t3 =>
      case data_in is
        when "001" => next_state <= t1;
        when "010" => next_state <= t22;
        when "100" => next_state <= t3;
        when others => next_state <= pres_state;
      end case;
    when others => next_state <= t1;
  end case;
end process fsm;

outputs: process (pres_state, data_in)
begin
  case pres_state is
    when t1 => data_out <= "100";
    when t22 => data_out <= "010";
    when t3 => data_out <= "001";
    when others => data_out <= (others => 'X');
  end case;
end process outputs;

end behavioral1;

architecture behavioral2 of moore_machine is
  type state_values is (t1, t22, t3);
  signal pres_state, next_state: state_values;
begin

pres_state <= t1 when reset = '0' else
              next_state when clock'event and clock ='1';

next_state <= t3 when data_in = "001" and pres_state = t1 else
              t22 when data_in = "010" and pres_state = t1 else
              t1 when data_in = "100" and pres_state = t1 else
              t22 when data_in = "001" and pres_state = t22 else
              t1 when data_in = "010" and pres_state = t22 else
              t22 when data_in = "100" and pres_state = t22 else
              t1 when data_in = "001" and pres_state = t3 else
              t22 when data_in = "010" and pres_state = t3 else
              t3 when data_in = "100" and pres_state = t3 else
              pres_state;

data_out <= "100" when pres_state = t1 else
            "010" when pres_state = t22 else
            "001" when pres_state = t3 else
            (others => 'X');

end behavioral2;

ARCHITECTURE behavioral3 OF moore_machine IS

   SUBTYPE STATE_TYPE IS
      std_logic_vector(2 DOWNTO 0);

   -- Automatic Output Encoding
   CONSTANT t1 : STATE_TYPE := "100";
   CONSTANT t22 : STATE_TYPE := "010";
   CONSTANT t3 : STATE_TYPE := "001";

   -- Declare current and next state signals
   SIGNAL current_state : STATE_TYPE;
   SIGNAL next_state : STATE_TYPE;

BEGIN

   -----------------------------------------------------------------
   clocked_proc : PROCESS (
      clock,
      reset
   )
   -----------------------------------------------------------------
   BEGIN
      IF (reset = '0') THEN
         current_state <= t1;
      ELSIF (clock'EVENT AND clock = '1') THEN
         current_state <= next_state;
      END IF;
   END PROCESS clocked_proc;

   -----------------------------------------------------------------
   nextstate_proc : PROCESS (
      current_state,
      data_in
   )
   -----------------------------------------------------------------
   BEGIN
      CASE current_state IS
         WHEN t1 =>
            IF (data_in = "010") THEN
               next_state <= t22;
            ELSIF (data_in = "001") THEN
               next_state <= t3;
            ELSIF (data_in = "100") THEN
               next_state <= t1;
            ELSE
               next_state <= t1;
            END IF;
         WHEN t22 =>
            IF (data_in = "010") THEN
               next_state <= t1;
            ELSIF (data_in = "001" or data_in = "100") THEN
               next_state <= t22;
            ELSE
               next_state <= t22;
            END IF;
         WHEN t3 =>
            IF (data_in = "001") THEN
               next_state <= t1;
            ELSIF (data_in = "010") THEN
               next_state <= t22;
            ELSIF (data_in = "100") THEN
               next_state <= t3;
            ELSE
               next_state <= t3;
            END IF;
         WHEN OTHERS =>
            next_state <= t1;
      END CASE;
   END PROCESS nextstate_proc;

   -- State as Output
   data_out <= current_state(2 DOWNTO 0);

END behavioral3;