Kolos Piątek 2

entity kolos is
    Port ( DATA_A : in STD_LOGIC;
           DATA_B : in STD_LOGIC;
           CLK_A : in STD_LOGIC;
           CLK_B : in STD_LOGIC;
           FIRST_A : in STD_LOGIC;
           FIRST_B : in STD_LOGIC;
           DATA_C : out STD_LOGIC_VECTOR (7 downto 0);
           CLK_C : out STD_LOGIC);
end kolos;

architecture Behavioral of kolos is
    signal BUF_A: STD_LOGIC_VECTOR(3 downto 0);
    signal BUF_B: std_logic_vector(3 downto 0);
    signal BUF: std_logic_vector(7 downto 0);

    READ_A : process(CLK_A)
        variable temp : std_logic_vector(7 downto 0);
        variable indeks : INTEGER := 0 ;

         begin
            if falling_edge(CLK_A) then
                if FIRST_A = '1' then
                    indeks=0;
                end if
                if indeks < 8 then
                    temp(indeks) := DATA_A;
                end if
                indeks := indeks +1
                if indeks = 8 then  -- czyli jak dostaliśmy właśnie ostatni bit
                    BUF_A <= temp(1)&temp(0)&temp(2)&temp(3);
                end if
            end if
    end process;

    READ_B : process(CLK_B)
        variable temp: std_logic_vector(7 downto 0);
        variable indeks: INTEGER := 0;

        begin
            if falling_edge(CLK_B) then
                if FIRST_B = '1' then
                    indeks:=0;
                end if
                if indeks <8 then
                    temp(indeks) := DATA_B;
                end if
                indeks := indeks +1
                if indeks = 8 then  -- czyli jak dostaliśmy właśnie ostatni bit
                    BUF_B <= temp(0)&temp(1)&temp(7)&temp(3);
                end if
            end if
    end process

    BUF <= BUF_A && BUF_B

    WRITE : process(CLK_C)
        variable counter : INTEGER := 0;
        begin
            if falling_edge(CLK_C)then
                case counter is
                    when 1 =>
                        DATA_C <= BUF;
                    when 1001 =>
                        CLK_C := '0';
                    when 3501 =>
                        CLK_C := '1';
                    when 5001 =>
                        DATA_C <= '11111111';
                    when others => null;
                end case
                counter := counter +1;
            end if
    end process;

end Behavioral;