Cortex M0 Kinetis GPIO

//enable clock
SIM->SCGC5|=SIM_SCGC_PORTp_MASK;

//SET MUX
//clear MUX bits
PORTp->PCR[x]&=~PORT_PCR_MUX_MASK;
//set mux bits as GPIO
PORTp->PCR[x]|=PORT_PCR_MUX(1);

//set direction: 1-OUT; 0-IN

PORTp->PDDR|=1UL<<x; //OUT
PORTp->PDDR&=~1UL<<x; //IN

//set OUT='high'
PORTp->PSOR|=1UL<<x;
//or
PORTp->PDOR=1UL<<x;

//set OUT='low'
PORTp->PCOR|=1UL<<x;

//toggle pin
PORTp->PTOR|=1UL<<x;

//read pin level

if (PORTp->PDIR& (1UL<<x))
    //if PORT p pin x execute this;