Modulo/2

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity modulo is
    Port ( E : in  STD_LOGIC;
           A : in  STD_LOGIC;
           B : in  STD_LOGIC;
           X0 : in  STD_LOGIC;
           X1 : in  STD_LOGIC;
           X2 : in  STD_LOGIC;
           X3 : in  STD_LOGIC;
           Y : out  STD_LOGIC);
end modulo;

architecture Behavioral of modulo is

begin

process(X0, X1, X2, X3, A, B, E) is

begin
    if(E = '0')then
        if(A = '0' and B = '0')then
            Y <= X0;
        elsif(A = '0' and B = '1')then
            Y <= X1;
        elsif(A = '1' and B = '0')then
            Y <= X2;
        else
            Y <= X3;
        end if;
    else
        Y <= not E;
    end if;
end process;
end Behavioral;