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  1. #include <msp430.h>
  2. //  This is a hack of TI example MSP430F55xx_adc_06.c
  3. //  It provides an option ADC_TIMER=1 which will do fixed-rate
  4. //  sampling at (SMCLK/20000)Hz, nominally 50Hz.
  5. //  ACLK=TACLK=32768 Hz; MCLK=SMCLK=default DCO=1.045 Mhz
  6. //  (It can go faster, but this provides for a visible LED blink.)
  7.  
  8. #define ADC_TIMER_PERIOD 16384      // 32768 Hz/Timer_period = F_sample Hz.(Modificare se necessario)
  9.  
  10. #define Num_of_Results   1
  11.  
  12. volatile unsigned int A0results[Num_of_Results];
  13. volatile unsigned int A1results[Num_of_Results];
  14. volatile unsigned int A2results[Num_of_Results];
  15. volatile unsigned int A3results[Num_of_Results];
  16.  
  17. int main(void)
  18. {
  19.   WDTCTL = WDTPW+WDTHOLD;                   // Stop watchdog timer
  20.  
  21.   P1DIR |= BIT0;
  22.   P1OUT &= ~BIT0;                           // Launchpad LED2=P4.7 (active high)
  23.  
  24.   P6SEL = 0x0F;                             // Enable A/D channel inputs
  25.   ADC12CTL0 = ADC12ON+ADC12MSC+ADC12SHT0_8; // Turn on ADC12, extend sampling time to avoid overflow of results
  26.  
  27.   ADC12CTL1 = ADC12SHP+ADC12CONSEQ_1;       // Use sampling timer, one burst per trigger
  28.   ADC12CTL2=ADC12RES_0;// 8bit
  29.  
  30.   ADC12MCTL0 = ADC12INCH_0;                 // ref+=AVcc, channel = A0
  31.   ADC12MCTL1 = ADC12INCH_1;                 // ref+=AVcc, channel = A1
  32.   ADC12MCTL2 = ADC12INCH_2;                 // ref+=AVcc, channel = A2
  33.   ADC12MCTL3 = ADC12INCH_3+ADC12EOS;        // ref+=AVcc, channel = A3, end seq.
  34.   ADC12IE = 0x08;                           // Enable ADC12IFG.3
  35.  
  36.   //    SLAS590M Table 6-11 shows that ADC12SHS=1 corresponds to
  37.   //    TA0:CCI1B, i.e. a pulse generated via TA0CCR1 on the F5529.
  38.   //    For others, check the data sheet.
  39.   //    This code generates a pulse train with a rising edge halfway
  40.   //    through the period for no particular reason.
  41.   TA0CCTL1 = OUTMOD_3;                      // Set/Reset for rising edge
  42.   TA0CCR1 = ADC_TIMER_PERIOD/2-1;           //   halfway through
  43.   TA0CCR0 = ADC_TIMER_PERIOD-1;             // Cycle every 20000 SMCLKs, i.e. 50Hz.
  44.   ADC12CTL1 |= ADC12SHS_1;                  // SHS=1 means TA0:CCI1B on the F5529
  45.   ADC12CTL0 |= ADC12ENC;                    // Note this locks sundry ADC12 fields.
  46.   TA0CTL = TASSEL_1 | ID_0 | MC_1 | TACLR;  // ACLK, /1, Up (,clear)
  47.  
  48.  
  49.  
  50.   __bis_SR_register(LPM0_bits + GIE);       // Enter LPM0, Enable interrupts
  51.   //__no_operation();                         // For debugger
  52.  
  53. }
  54.  
  55. #if defined(__TI_COMPILER_VERSION__) || defined(__IAR_SYSTEMS_ICC__)
  56. #pragma vector=ADC12_VECTOR
  57. __interrupt void ADC12ISR (void)
  58. #elif defined(__GNUC__)
  59. void __attribute__ ((interrupt(ADC12_VECTOR))) ADC12ISR (void)
  60. #else
  61. #error Compiler not supported!
  62. #endif
  63. {
  64.   static unsigned int index = 0;
  65.  
  66.   switch(__even_in_range(ADC12IV,34))
  67.   {
  68.   case  0: break;                           // Vector  0:  No interrupt
  69.   case  2: break;                           // Vector  2:  ADC overflow
  70.   case  4: break;                           // Vector  4:  ADC timing overflow
  71.   case  6: break;                           // Vector  6:  ADC12IFG0
  72.   case  8: break;                           // Vector  8:  ADC12IFG1
  73.   case 10: break;                           // Vector 10:  ADC12IFG2
  74.   case 12:                                  // Vector 12:  ADC12IFG3
  75.     A0results[index] = ADC12MEM0;           // Move A0 results, IFG is cleared
  76.     A1results[index] = ADC12MEM1;           // Move A1 results, IFG is cleared
  77.     A2results[index] = ADC12MEM2;           // Move A2 results, IFG is cleared
  78.     A3results[index] = ADC12MEM3;           // Move A3 results, IFG is cleared
  79.  
  80.     ADC12CTL0 &= ~ADC12ENC;                 // Re-arm burst trigger
  81.     ADC12CTL0 |= ADC12ENC;                  // See also SLAU208P Fig 28-8
  82.  
  83.     index++;                                // Increment results index, modulo; Set Breakpoint1 here
  84.  
  85.     if (index == Num_of_Results)
  86.     {
  87.       index = 0;
  88.  
  89.       P1OUT ^= BIT0;                        // Toggle LED1 Fcamp/num_results/toggle (1Hz/1/2=~0.5Hz)
  90.  
  91.     }
  92.   case 14: break;                           // Vector 14:  ADC12IFG4
  93.   case 16: break;                           // Vector 16:  ADC12IFG5
  94.   case 18: break;                           // Vector 18:  ADC12IFG6
  95.   case 20: break;                           // Vector 20:  ADC12IFG7
  96.   case 22: break;                           // Vector 22:  ADC12IFG8
  97.   case 24: break;                           // Vector 24:  ADC12IFG9
  98.   case 26: break;                           // Vector 26:  ADC12IFG10
  99.   case 28: break;                           // Vector 28:  ADC12IFG11
  100.   case 30: break;                           // Vector 30:  ADC12IFG12
  101.   case 32: break;                           // Vector 32:  ADC12IFG13
  102.   case 34: break;                           // Vector 34:  ADC12IFG14
  103.   default: break;
  104.   }
  105. }
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