sub_80BACDC:
	push	{r4, r5, r6, lr}
	add	sp, sp, #0xffffffc0
	add	r4, r0, #0
	lsl	r4, r4, #0x18
	lsr	r4, r4, #0x18
	ldr	r1, .L127
	mov	r0, sp
	mov	r2, #0x40
	bl	memcpy
	ldr	r6, .L127+0x4
	ldr	r5, .L127+0x8
	mov	r1, #0x0
	ldrsb	r1, [r5, r1]
	lsl	r1, r1, #0x2
	add	r1, r1, r6
	lsl	r4, r4, #0x18
	asr	r4, r4, #0x18
	ldr	r0, [r1]
	add	r0, r0, r4
	str	r0, [r1]
	mov	r0, #0x0
	ldrsb	r0, [r5, r0]
	lsl	r2, r0, #0x2
	add	r3, r2, r6
	lsl	r0, r0, #0x1
	add	r0, r0, #0x1
	lsl	r0, r0, #0x1
	add	r0, r0, sp
	mov	r4, #0x0
	ldrsh	r1, [r0, r4]
	ldr	r0, [r3]
	cmp	r0, r1
	ble	.L125	@cond_branch
	mov	r1, sp
	add	r0, r1, r2
	mov	r4, #0x0
	ldrsh	r0, [r0, r4]
	str	r0, [r3]
.L125:
	mov	r2, #0x0
	ldrsb	r2, [r5, r2]
	lsl	r0, r2, #0x2
	add	r3, r0, r6
	add	r0, r0, sp
	mov	r4, #0x0
	ldrsh	r1, [r0, r4]
	ldr	r0, [r3]
	cmp	r0, r1
	bge	.L126	@cond_branch
	lsl	r0, r2, #0x1
	add	r0, r0, #0x1
	lsl	r0, r0, #0x1
	add	r0, r0, sp
	mov	r1, #0x0
	ldrsh	r0, [r0, r1]
	str	r0, [r3]
.L126:
	add	sp, sp, #0x40
	pop	{r4, r5, r6}
	pop	{r0}
	bx	r0
.L128:
	.align	2, 0
.L127:
	.word	gUnknown_083D039C
	.word	gUnknown_020387B4
	.word	gUnknown_020387B3
.Lfe14:
	.size	 sub_80BACDC,.Lfe14-sub_80BACDC
.text
	.align	2, 0