kappabox 2020-24-06

/****************************************************
 *           KAPPA BOX for SEGA SATURN
 *             BY SUWACRAB 2020-21-06
 *            REVISION DATE 2020-24-06
*****************************************************/
#ifndef KBOX_H
#define KBOX_H

/*----- type defines ------------------------------------------------*/
typedef unsigned char u8;
typedef unsigned short u16;
typedef unsigned int u32;

typedef signed char s8;
typedef signed short s16;
typedef signed int s32;

#define INLINE static inline

/*----- RAM defines -------------------------------------------------*/
#define PACKED   __attribute__((packed))
#define ALIGN(n) __attribute__((aligned(n)))

#define WRAM_LO ((volatile u8*)(0x20200000))
#define WRAM_HI ((volatile u8*)(0x26000000))
#define SCU_MEM ((volatile u8*)(0x25FE0000))
#define DMA_MEM ((volatile u8*)(0xFFFFFF80))

/*----- DMA defines -------------------------------------------------*/
typedef struct CH_DMA {
  u32 src;                         /* $00 (SAR, source address)      */
  u32 dst;                         /* $04 (DAR, destination address) */
  u32 cnt;                         /* $08 (TCR, transfer count)      */
  u32 ctrl;                        /* $0C (CHCR, control, i guess)   */
} ALIGN(2) CH_DMA;

typedef enum dma_sizes {
  DMA_SIZE_BYTE,                                  /* $01 byte.       */
  DMA_SIZE_WORD,                                  /* $02 bytes.      */
  DMA_SIZE_LONG,                                  /* $04 bytes.      */
  DMA_SIZE_128B                                   /* $10 bytes!      */
} dma_sizes;

// DMA channels, operation register, control registers
#define DMA_REG ((volatile CH_DMA*)DMA_MEM)
#define DMA_REG_OR ((volatile u32*)(0xFFFFFFB0))
#define DMA_REG_CR ((volatile u8*)(0xFFFFFE71))
// DMA destination is fixed, dest is incremented, dest is decremented
// > used for changing the direction that the destination
// > address goes during a transfer.
#define DMA_DST_FIX (0<<14)
#define DMA_DST_INC (1<<14)
#define DMA_DST_DEC (2<<14)
// DMA source fixed, src increments, src decrements
// > same as the above, except with the source address.
#define DMA_SRC_FIX (0<<12)
#define DMA_SRC_INC (1<<12)
#define DMA_SRC_DEC (2<<12)
// DMA size
// > controls the size of each unit transferred.
// > $0 is 1 byte, $1 is 2 bytes, $2 is 4 bytes, $3 is 16 bytes.
#define DMA_SIZE(n) (((n)&3)<<10)

// DMA auto-request, interrupt enable, transfer-end, enable
#define DMA_AR (1<<9)
#define DMA_IE (1<<2)
#define DMA_TE (1<<1)
#define DMA_ON (1)

// DMA master enable,NMIF,address error, priority
#define DMA_DME (1)
#define DMA_NMIF (1<<1)
#define DMA_AE (1<<2)
#define DMA_PR (1<<3)

// stop all DMA transfers
INLINE void sh2_dma_stop()
{ *DMA_REG_OR &= (DMA_AE | DMA_PR | DMA_NMIF); }
// initialize DMA channels
INLINE void sh2_dma_init()
{
  sh2_dma_stop();
  DMA_REG[0].ctrl = 0;
  DMA_REG[1].ctrl = 0;
}
// check if DMA channel `ch` is active
INLINE u32 sh2_dma_active(u32 ch)
{ return (!(DMA_REG[ch].ctrl&DMA_TE)) ? 1 : 0; }
// blasts from `src` to `dst`, in `cnt` amount of transfers, using `mode`.
INLINE void sh2_dma_blast(u32 ch, void *src,void *dst,u32 cnt,u32 mode)
{
  // "why are you using assembly?" it's easier to debug in an emu, trust me.
  // alternatively, you may comment this part out and just use
  // the C section (ha) below.
  asm(
    // move src,dst,cnt
    "MOV.L %[src],@(0,%[ch])\t\n"
    "MOV.L %[dst],@(4,%[ch])\t\n"
    "MOV.L %[cnt],@(8,%[ch])\t\n"
    // REG_CR[ch] = 0
    "MOV #0,R0\t\n"
    "MOV.B R0,@%[cr]\t\n"
    // move ctrl to DMA_REG[ch].ctrl
    "MOV.L @(12,%[ch]),R0\t\n" // read from ctrl before writing.
    "MOV.L %[mode],@(12,%[ch])\t\n"
    :: [ch]"r"(((u32)&DMA_REG[ch])),[src]"r"(src),
    [dst]"r"(dst),[cnt]"r"(cnt),
    [mode]"r"(mode),[cr]"r"(((u32)&DMA_REG_CR[ch]))
  ); // */

  /* DMA_REG[ch].src = (u32)src;
  DMA_REG[ch].dst = (u32)dst;
  DMA_REG[ch].cnt = cnt;
  DMA_REG_CR[ch] = 0; // external request
  DMA_REG[ch].ctrl = (DMA_REG[ch].ctrl&0) | mode; // */
}

/* DMA example: copy $10 bytes from WRAM_LO[$000000] to WRAM_LO[$000100]
  * sh2_dma_init();
  * DMA_REG_OR = DMA_DME | DMA_PR;
  *
  * sh2_dma_blast(0,
  *   &WRAM_LO[0],&WRAM_LO[0x100],0x10,
  *   DMA_SRC_INC|DMA_DST_INC|DMA_AR|DMA_ON
  * );
  * // DMA_SRC_INC is so the source address increases
  * // DMA_DST_INC is so the destination address increases
  * // DMA_AR is so it the transfer occurs immediately...?
  ** idk what its actually for but if u dont put it in it doesn't copy
*/

#endif