library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

-- CPOL0 (Idle CLK = 0)
-- CPHA1 (Change on rising edge, sampling on falling)

entity spimaster is
  port (
    CLK_IN           : in  std_logic;
    DATA_IN_H        : in  std_logic_vector(7 downto 0);
    DATA_IN_L        : in  std_logic_vector(7 downto 0);
    CS_OUT           : out std_logic;
    BUSY_FLAG        : out std_logic;
    MOSI             : out std_logic;
    ENABLE           : in  std_logic;
    SEND_CONFIG      : in  std_logic;
    CONFIG_BIT_STATE : in  std_logic;
    SPI_CLK          : out std_logic
    );
end entity;

architecture arch of spimaster is

  signal BITPOS        : integer range 0 to 8 := 8;
  signal DATA_WORD     : std_logic_vector(15 downto 0);
  signal CLK_OUT_INT   : std_logic            := '0';
  signal BUSY_FLAG_INT : std_logic            := '0';
  signal MOSI_INT      : std_logic            := '0';
begin

  process(CLK_IN)
  begin
    if(rising_edge(CLK_IN)) then
      CLK_OUT_INT <= '0';
      if(BUSY_FLAG_INT = '0' and ENABLE = '1') then

        if(SEND_CONFIG = '1') then
          MOSI_INT    <= CONFIG_BIT_STATE;
          CLK_OUT_INT <= '1';
        else
          BITPOS        <= 8;
          DATA_WORD     <= DATA_IN_H & DATA_IN_L;
          CS_OUT        <= '0';
          MOSI_INT      <= '0';
          BUSY_FLAG_INT <= '1';
        end if;
      else  --BUSY_FLAG == 1 -> transmit in progress
        if(BUSY_FLAG_INT = '1') then
          if(CLK_OUT_INT = '0') then
            if(BITPOS > 0) then
              MOSI_INT <= DATA_WORD(BITPOS-1);
            end if;
            if(BITPOS = 0) then
              BUSY_FLAG_INT <= '0';
              CS_OUT        <= '1';
              MOSI_INT      <= '0';
            else
              BITPOS      <= BITPOS - 1;
              CLK_OUT_INT <= '1';
            end if;
          else
            CLK_OUT_INT <= '0';
          end if;
        end if;
      end if;

    end if;
  end process;

  SPI_CLK   <= CLK_OUT_INT;
  BUSY_FLAG <= BUSY_FLAG_INT;
  MOSI      <= MOSI_INT;

end architecture;