BCM63xx GPIOs to SS#

/* BCM6348 */
    u32 val;
    /* Enable Extra SPI CS */
    /* GPIO 29 is SSx FIXME */
    val = bcm_gpio_readl(GPIO_MODE_REG);
    val |= GPIO_MODE_6348_G1_SPI_MASTER;
    bcm_gpio_writel(val, GPIO_MODE_REG);

/* BCM6358 */
    u32 val;
    /* Enable Overlay for SPI SS Pins */
    val = bcm_gpio_readl(GPIO_MODE_REG);
    val |= GPIO_MODE_6358_EXTRA_SPI_SS;
    bcm_gpio_writel(val, GPIO_MODE_REG);
    /* Enable SPI Slave Select as Output Pins */
        /* GPIO 32 is SS2, GPIO 33 is SS3 */
    val = bcm_gpio_readl(GPIO_CTL_HI_REG);
    val |= 0x0003
    bcm_gpio_writel(val, GPIO_CTL_HI_REG);

/* BCM6368 */
    u32 val;
    /* Enable Extra SPI CS */
    val = bcm_gpio_readl(GPIO_MODE_REG);
    val |= (GPIO_MODE_6368_SPI_SSN2 | GPIO_MODE_6368_SPI_SSN3 | GPIO_MODE_6368_SPI_SSN4 | GPIO_MODE_6368_SPI_SSN5);
    bcm_gpio_writel(val, GPIO_MODE_REG);
    /* Enable SPI Slave Select as Output Pins */
        /* GPIO 28 is SS2, GPIO 29 is SS3, GPIO 30 is SS4, GPIO 31 is SS5*/
    val = bcm_gpio_readl(GPIO_CTL_HI_REG);
    val |= (GPIO_MODE_6368_SPI_SSN2 | GPIO_MODE_6368_SPI_SSN3 | GPIO_MODE_6368_SPI_SSN4 | GPIO_MODE_6368_SPI_SSN5);
    bcm_gpio_writel(val, GPIO_CTL_HI_REG);