laba5

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all; -- CONV_STD_LOGIC_VECTOR(int, size)
use std.textio.all;

entity transform_vec is
end entity;

architecture arch of transform_vec is

    signal vec1:std_logic_vector(0 to 7):="X01ZW010";
    signal vec2:std_logic_vector(0 to 7):="X01ZX010";
    signal rvec1,rvec2:std_logic_vector(0 to 7);

    function transform_vec_to_x01z
        (main_vec:std_logic_vector(0 to 7))
        return std_logic_vector is
        variable final_vec : std_logic_vector(main_vec'range);
    begin
        loopi: for i in main_vec'range loop
            case main_vec(i) is
                when '0' => final_vec(i):= '0';
                when '1' => final_vec(i):= '1';
                when 'X' => final_vec(i):= 'X';
                when 'Z' => final_vec(i):= 'Z';
                when others => assert(false)
                               report "Error value"
                               severity error;
            end case;
        end loop loopi;
        return final_vec;
    end transform_vec_to_x01z;
begin
    rvec1 <= transform_vec_to_x01z(vec1);
    rvec2 <= transform_vec_to_x01z(vec2);
end;