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Jun 16th, 2021
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VHDL 2.34 KB | None | 0 0
  1. library ieee ;
  2.  
  3. use ieee.std_logic_1164.all;
  4.  
  5. use ieee.std_logic_unsigned.all;
  6.  
  7.  
  8.  
  9. entity SkrzyzowanieKons is
  10.  
  11. port( writedata: in std_logic_vector(31 downto 0);
  12.  
  13.       clk_clk, reset_reset_n:   in std_logic;
  14.  
  15.       wr, cs : in std_logic;
  16.  
  17.       leds: out std_logic_vector(3 downto 0);
  18.         hex: out std_logic_vector (6 downto 0)
  19.         );
  20.  
  21. end SkrzyzowanieKons;
  22.  
  23.  
  24.  
  25. architecture rtl of SkrzyzowanieKons is
  26.  
  27. signal reg: std_logic_vector(2 downto 0);
  28.  
  29. signal licznik: natural range 0 to 99999999 := 0; -- licznik procesora  
  30.  
  31. type STATES_OF_LIGHTS is (HEX_01,HEX_00,HEX_3,HEX_2,HEX_1
  32.  
  33.                                     ) ; -- opis stanow swiatel oraz ich licznikow
  34.  
  35.  
  36. signal STATE , NEXT_ONE : STATES_OF_LIGHTS ;    
  37.  
  38. begin
  39.  
  40. process(clk_clk)
  41.  
  42. begin
  43.  
  44.    if (clk_clk'event and clk_clk='1') then
  45.  
  46.       if(wr='1' and cs='1') then
  47.  
  48.         reg <=writedata(2 downto 0);
  49.         end if;
  50.  
  51.     end if;
  52.  
  53. end process;
  54.  
  55.  
  56.  
  57. process(clk_clk)
  58.  
  59. begin
  60.  
  61.         if (reg="000") then leds <= "1001"; -- LED1: ON LED2: OFF LED3: OFF LED4: ON
  62.         STATE<=HEX_3;
  63.         licznik <= 00000000;
  64.    
  65.             elsif (reg="001") then leds <= "0110"; -- LED1: OFF LED2: ON LED3: ON LED4: OFF
  66.         STATE<=HEX_3;
  67.         licznik <= 00000000;
  68.        
  69.         elsif (reg="010") then leds <= "1111";  -- LED1: ON LED2: ON LED3: ON LED4: ON
  70.         STATE<=HEX_01;
  71.         licznik <= 00000000;       
  72.  
  73.         elsif (reg="100") then leds <= "0000";  -- LED1: OFF LED2: OFF LED3: OFF LED4: OFF
  74.         STATE<=HEX_01;
  75.         licznik <= 00000000;
  76.        
  77.         elsif (rising_edge(clk_clk)) then
  78.          licznik <= licznik + 1;
  79.          
  80.                 if(licznik = 50000000) then
  81.                         STATE<=NEXT_ONE;
  82.                         licznik <= 00000000;
  83.                      end if;
  84.  
  85.      
  86.  
  87.     end if;
  88.  
  89. end process;
  90.  
  91.  
  92. process(STATE, clk_clk) -- sprawdzac tylko zbocze narastajaca
  93. begin
  94.  if (rising_edge(clk_clk)) then
  95. case STATE is
  96.  
  97. when HEX_3 =>-- licznik pokazuje 3
  98.      hex <= "0110000" ; -- trzy
  99.      NEXT_ONE<=HEX_2;
  100.        
  101. when HEX_2 =>-- licznik pokazuje 2
  102.         hex <= "0100100" ;-- dwa
  103.         NEXT_ONE<=HEX_1;
  104.        
  105. when HEX_1 =>-- licznik pokazuje 1
  106.     hex <= "1111001" ;-- jeden
  107.        
  108. --______________________________________________________________________________________________________________________
  109.  
  110.        
  111. when HEX_00 =>-- licznik pokazuje 0
  112.      hex <= "1000000" ;
  113.         NEXT_ONE<= HEX_01;
  114.        
  115. when HEX_01=>-- licznik pokazuje 1
  116.      hex <= "1111001" ;-- jeden
  117.      
  118.          end case;
  119. end if;
  120.  end process;
  121.  
  122.  
  123. end rtl;
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