[PSDS] Counter from 0 to 999

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;


entity counter is
    Port ( en : in STD_LOGIC;
           reset : in STD_LOGIC;
           clk : in STD_LOGIC;
           pulse : out STD_LOGIC;
           ones : out STD_LOGIC_VECTOR (3 downto 0);
           tens : out STD_LOGIC_VECTOR (3 downto 0);
           hund : out STD_LOGIC_VECTOR (3 downto 0));
end counter;

architecture Behavioral of counter is
  signal pulse_s1 :std_logic;
  signal pulse_s2 :std_logic;

begin
  ones_cnt: entity work.dec_counter(Behavioral)
            port map(
              clk=>clk,
              reset=>reset,
              en=>en,
              q=>ones,
              pulse=>pulse_s1);
tens_cnt: entity work.dec_counter(Behavioral)
          port map(
            clk=>clk,
            reset=>reset,
            en=>pulse_s1,
            q=>tens,
            pulse=>pulse_s2);
hund_cnt: entity work.dec_counter(Behavioral)
           port map(
             clk=>clk,
             reset=>reset,
             en=>pulse_s2,
             q=>hund,
             pulse=>pulse);



end Behavioral;