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JonD1988

PICBlinkSketch

Jan 9th, 2023
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  1. /*
  2.  * File:   main.c
  3.  * Author: Jonathan
  4.  *
  5.  * Created on January 9, 2023, 12:54 PM
  6.  */
  7. // PIC18F14K50 Configuration Bit Settings
  8. // 'C' source line config statements
  9. // CONFIG1L
  10. #pragma config CPUDIV = NOCLKDIV// CPU System Clock Selection bits (No CPU System Clock divide)
  11. #pragma config USBDIV = OFF     // USB Clock Selection bit (USB clock comes directly from the OSC1/OSC2 oscillator block; no divide)
  12.  
  13. // CONFIG1H
  14. #pragma config FOSC = IRC       // Oscillator Selection bits (Internal RC oscillator)
  15. #pragma config PLLEN = OFF      // 4 X PLL Enable bit (PLL is under software control)
  16. #pragma config PCLKEN = ON      // Primary Clock Enable bit (Primary clock enabled)
  17. #pragma config FCMEN = OFF      // Fail-Safe Clock Monitor Enable (Fail-Safe Clock Monitor disabled)
  18. #pragma config IESO = OFF       // Internal/External Oscillator Switchover bit (Oscillator Switchover mode disabled)
  19.  
  20. // CONFIG2L
  21. #pragma config PWRTEN = OFF     // Power-up Timer Enable bit (PWRT disabled)
  22. #pragma config BOREN = SBORDIS  // Brown-out Reset Enable bits (Brown-out Reset enabled in hardware only (SBOREN is disabled))
  23. #pragma config BORV = 19        // Brown-out Reset Voltage bits (VBOR set to 1.9 V nominal)
  24.  
  25. // CONFIG2H
  26. #pragma config WDTEN = OFF      // Watchdog Timer Enable bit (WDT is controlled by SWDTEN bit of the WDTCON register)
  27. #pragma config WDTPS = 32768    // Watchdog Timer Postscale Select bits (1:32768)
  28.  
  29. // CONFIG3H
  30. #pragma config HFOFST = ON      // HFINTOSC Fast Start-up bit (HFINTOSC starts clocking the CPU without waiting for the oscillator to stablize.)
  31. #pragma config MCLRE = ON       // MCLR Pin Enable bit (MCLR pin enabled; RA3 input pin disabled)
  32.  
  33. // CONFIG4L
  34. #pragma config STVREN = ON      // Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
  35. #pragma config LVP = OFF        // Single-Supply ICSP Enable bit (Single-Supply ICSP disabled)
  36. #pragma config BBSIZ = OFF      // Boot Block Size Select bit (1kW boot block size)
  37. #pragma config XINST = OFF      // Extended Instruction Set Enable bit (Instruction set extension and Indexed Addressing mode disabled (Legacy mode))
  38.  
  39. // CONFIG5L
  40. #pragma config CP0 = OFF        // Code Protection bit (Block 0 not code-protected)
  41. #pragma config CP1 = OFF        // Code Protection bit (Block 1 not code-protected)
  42.  
  43. // CONFIG5H
  44. #pragma config CPB = OFF        // Boot Block Code Protection bit (Boot block not code-protected)
  45. #pragma config CPD = OFF        // Data EEPROM Code Protection bit (Data EEPROM not code-protected)
  46.  
  47. // CONFIG6L
  48. #pragma config WRT0 = OFF       // Table Write Protection bit (Block 0 not write-protected)
  49. #pragma config WRT1 = OFF       // Table Write Protection bit (Block 1 not write-protected)
  50.  
  51. // CONFIG6H
  52. #pragma config WRTC = OFF       // Configuration Register Write Protection bit (Configuration registers not write-protected)
  53. #pragma config WRTB = OFF       // Boot Block Write Protection bit (Boot block not write-protected)
  54. #pragma config WRTD = OFF       // Data EEPROM Write Protection bit (Data EEPROM not write-protected)
  55.  
  56. // CONFIG7L
  57. #pragma config EBTR0 = OFF      // Table Read Protection bit (Block 0 not protected from table reads executed in other blocks)
  58. #pragma config EBTR1 = OFF      // Table Read Protection bit (Block 1 not protected from table reads executed in other blocks)
  59.  
  60. // CONFIG7H
  61. #pragma config EBTRB = OFF      // Boot Block Table Read Protection bit (Boot block not protected from table reads executed in other blocks)
  62.  
  63. // #pragma config statements should precede project file includes.
  64. // Use project enums instead of #define for ON and OFF.
  65.  
  66. #define _XTAL_FREQ 1000000  //CPU clock frequency
  67. #include <xc.h>             //Include general header file
  68.  
  69. void main(void) //Main function of the program
  70. {
  71.     TRISCbits.TRISC0 = 0;   //Configure RC0 pin as output TRIS is the command. C is for the register. TRISC0 means IO Port 0. =0 sets it as output
  72.     while (1)               //Main loop of the program
  73.     {
  74.         LATCbits.LATC0 ^= 0x01;//Toggle RC0 pin
  75.         __delay_ms(500);    //500ms delay
  76.     } //End of while loop
  77. } //End of void main(void)
  78. //Reference https://www.circuitbread.com/tutorials/embedded-c-programming-with-the-pic18f14k50-2-our-first-program
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