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- library IEEE;
- use IEEE.std_logic_1164.all;
- -- Description of a static D flip-flop (D latch) with
- -- high-active enable and high-active asynchronous reset.
- entity Dlatch is
- port (
- en : in STD_LOGIC;
- res : in STD_LOGIC;
- D : in STD_LOGIC;
- Q: out STD_LOGIC
- );
- end entity;
- architecture impl of Dlatch is
- begin
- process(D,en,res) is
- begin
- if res = '1' then
- Q <= '0';
- elsif en = '1' then
- Q <= D;
- end if;
- end process;
- end architecture;
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