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uc3_a3_xplained.h

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Jul 29th, 2015
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  1.  
  2. #ifndef UC3_A3_XPLAINED_H_
  3. #define UC3_A3_XPLAINED_H_
  4.  
  5. #include "compiler.h"
  6.  
  7. #ifdef __AVR32_ABI_COMPILER__
  8. #  include "led.h"
  9. #endif
  10.  
  11.  
  12. #ifdef __cplusplus
  13. extern "C" {
  14. #endif
  15.  
  16. /**
  17.  * @defgroup at32uc3a3_xpld_config UC3-A3 Xplained Board Configuration
  18.  * @{
  19.  */
  20.  
  21. /** \name Oscillator Definitions
  22.  * @{
  23.  */
  24.  
  25. /** \brief System oscillator frequencies (Hz.) and startup times (periods).
  26.  *
  27.  * RCOsc has no custom calibration by default. Set the following definition
  28.  * to the appropriate value if a custom RCOsc calibration has been applied
  29.  * to your part.
  30.  */
  31.  
  32. /* RCOsc frequency: Hz. */
  33. #define FRCOSC                      (AVR32_PM_RCOSC_FREQUENCY)
  34.  
  35. /** Osc32 frequency (Hz.) and startup time (RCOsc periods). */
  36. #define FOSC32                      (32768)
  37. #define OSC32_STARTUP               (AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC)
  38.  
  39. #define BOARD_OSC32_IS_XTAL         true
  40. #define BOARD_OSC32_HZ              FOSC32
  41. #define BOARD_OSC32_STARTUP_US      (570000)
  42.  
  43. /** Osc frequency (Hz.) and startup time (RCOsc periods). */
  44. #define FOSC0                       (12000000)
  45. #define OSC0_STARTUP                (AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC)
  46.  
  47. #define BOARD_OSC0_IS_XTAL          true
  48. #define BOARD_OSC0_HZ               FOSC0
  49. #define BOARD_OSC0_STARTUP_US       (18000)
  50. /** @} */
  51.  
  52. /* \def Number of LEDs. */
  53. #define LED_COUNT                   4
  54.  
  55. /* \name UC3-A3-Xplained LED to GPIO pin mappings.
  56.  * @{
  57.  */
  58. #define LED0_GPIO                   (AVR32_PIN_PB03)
  59. #define LED1_GPIO                   (AVR32_PIN_PX22)
  60. #define LED2_GPIO                   (AVR32_PIN_PB02)
  61. #define LED3_GPIO                   (AVR32_PIN_PB06)
  62. /** @} */
  63.  
  64. /** \name GPIO Connections of Push Buttons
  65.  * @{
  66.  */
  67. #define GPIO_PUSH_BUTTON_0          (AVR32_PIN_PB01)
  68. #define GPIO_PUSH_BUTTON_0_PRESSED  (0)
  69. /** @} */
  70.  
  71. /** \name SDRAM Definitions
  72.  * @{
  73.  */
  74. /** Part header file of used SDRAM(s). */
  75. #define SDRAM_PART_HDR              "mt48lc16m16a2tg7e/mt48lc16m16a2tg7e.h"
  76.  
  77. /** SDRAM(s) data bus width (always 16 bits on UC3) */
  78. #define SDRAM_DBW                    16
  79. /** @} */
  80.  
  81. /** \name USART connections to the UC3B board controller
  82.  * @{
  83.  */
  84. #define USART                       (&AVR32_USART1)
  85. #define USART_RXD_PIN               AVR32_USART1_RXD_0_0_PIN
  86. #define USART_RXD_FUNCTION          AVR32_USART1_RXD_0_0_FUNCTION
  87. #define USART_TXD_PIN               AVR32_USART1_TXD_0_0_PIN
  88. #define USART_TXD_FUNCTION          AVR32_USART1_TXD_0_0_FUNCTION
  89. #define USART_IRQ                   AVR32_USART1_IRQ
  90. #define USART_IRQ_GROUP             AVR32_USART1_IRQ_GROUP
  91. #define USART_SYSCLK                SYSCLK_USART1
  92. /** @} */
  93.  
  94. /** \name TWI Master connections to GPIO
  95.  *
  96.  * \todo
  97.  * The TWIM pins that are mapped here should correspond with the TWIM
  98.  * interfaces selected in the conf_board.h file.  In addition, the
  99.  * default values below map TWIM the pins on the Xplaned J1 block.
  100.  * Modify the mappings or add appropriate conditional compilation as
  101.  * needed.
  102.  *
  103.  * @{
  104.  */
  105. #define TWIMS0_TWD_PIN              AVR32_TWIMS0_TWD_0_0_PIN
  106. #define TWIMS0_TWD_FUNCTION         AVR32_TWIMS0_TWD_0_0_FUNCTION
  107. #define TWIMS0_TWCK_PIN             AVR32_TWIMS0_TWCK_0_0_PIN
  108. #define TWIMS0_TWCK_FUNCTION        AVR32_TWIMS0_TWCK_0_0_FUNCTION
  109. /** @} */
  110.  
  111. /** \name MXT143E Xplained top module
  112.  * @{
  113.  */
  114. // SPI 1 liegt auf Header J1
  115. //#define MXT143E_XPLAINED_PDCA_PID      AVR32_PDCA_PID_SPI1_TX
  116. //#define MXT143E_XPLAINED_SPI           &AVR32_SPI1
  117. //#define MXT143E_XPLAINED_TWI           &AVR32_TWIM0
  118. //#define MXT143E_XPLAINED_CS            (AVR32_SPI1_NPCS_0_0_PIN)
  119. //#define MXT143E_XPLAINED_CS_FUNCTION   (AVR32_SPI1_NPCS_0_0_FUNCTION)
  120. //#define MXT143E_XPLAINED_SCK           (AVR32_SPI1_SCK_0_0_PIN)
  121. //#define MXT143E_XPLAINED_SCK_FUNCTION  (AVR32_SPI1_SCK_0_0_FUNCTION)
  122. //#define MXT143E_XPLAINED_MOSI          (AVR32_SPI1_MOSI_0_0_PIN)
  123. //#define MXT143E_XPLAINED_MOSI_FUNCTION (AVR32_SPI1_MOSI_0_0_FUNCTION)
  124. //#define MXT143E_XPLAINED_MISO          (AVR32_SPI1_MISO_0_0_PIN)
  125. //#define MXT143E_XPLAINED_MISO_FUNCTION (AVR32_SPI1_MISO_0_0_FUNCTION)
  126. //#define MXT143E_XPLAINED_CHG           (AVR32_PIN_PX57)
  127. //#define MXT143E_XPLAINED_DC            (AVR32_PIN_PX58)
  128. //#define MXT143E_XPLAINED_BACKLIGHT     (AVR32_PIN_PA20)
  129. //#define MXT143E_XPLAINED_LCD_RESET     (AVR32_PIN_PA18)
  130. /** @} */
  131.  
  132. /** \name Header J1 SPI
  133.  * @{
  134.  */
  135. #define HeaderJ1_SPI                 (&AVR32_SPI1)
  136. #define HeaderJ1_SPI_NPCS            0
  137. #define HeaderJ1_SPI_SCK_PIN         AVR32_SPI1_SCK_0_0_PIN
  138. #define HeaderJ1_SPI_SCK_FUNCTION    AVR32_SPI1_SCK_0_0_FUNCTION
  139. #define HeaderJ1_SPI_MISO_PIN        AVR32_SPI1_MISO_0_0_PIN
  140. #define HeaderJ1_SPI_MISO_FUNCTION   AVR32_SPI1_MISO_0_0_FUNCTION
  141. #define HeaderJ1_SPI_MOSI_PIN        AVR32_SPI1_MOSI_0_0_PIN
  142. #define HeaderJ1_SPI_MOSI_FUNCTION   AVR32_SPI1_MOSI_0_0_FUNCTION
  143. #define HeaderJ1_SPI_NPCS0_PIN       AVR32_SPI1_NPCS_0_0_PIN
  144. #define HeaderJ1_SPI_NPCS0_FUNCTION  AVR32_SPI1_NPCS_0_0_FUNCTION
  145. /** @} */
  146.  
  147.  
  148. /** Validate board support for the common sensor service. */
  149. #define                             COMMON_SENSOR_PLATFORM
  150.  
  151. /** \name SPI Connections of the AT45DBX Data Flash Memory
  152.  * @{
  153.  */
  154. // SPI 0 liegt auf Header J4
  155. #define AT45DBX_SPI                 (&AVR32_SPI0)
  156. #define AT45DBX_SPI_NPCS            1
  157. #define AT45DBX_SPI_SCK_PIN         AVR32_SPI0_SCK_0_0_PIN
  158. #define AT45DBX_SPI_SCK_FUNCTION    AVR32_SPI0_SCK_0_0_FUNCTION
  159. #define AT45DBX_SPI_MISO_PIN        AVR32_SPI0_MISO_0_0_PIN
  160. #define AT45DBX_SPI_MISO_FUNCTION   AVR32_SPI0_MISO_0_0_FUNCTION
  161. #define AT45DBX_SPI_MOSI_PIN        AVR32_SPI0_MOSI_0_0_PIN
  162. #define AT45DBX_SPI_MOSI_FUNCTION   AVR32_SPI0_MOSI_0_0_FUNCTION
  163. #define AT45DBX_SPI_NPCS0_PIN       AVR32_SPI0_NPCS_1_0_PIN
  164. #define AT45DBX_SPI_NPCS0_FUNCTION  AVR32_SPI0_NPCS_1_0_FUNCTION
  165. /** @} */
  166.  
  167. /** @} */ // at32uc3a3_xpld_config group
  168.  
  169. #ifdef __cplusplus
  170. }
  171. #endif
  172.  
  173. #endif /* UC3_A3_XPLAINED_H_ */
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