Timer 3 init

    RCC->APB1ENR |= RCC_APB1ENR_TIM3EN; //Enable tim3 clock

    GPIOA->CRL  |= GPIO_CRL_MODE6_1; // 01: Output mode, max speed 10 MHz.
    GPIOA->CRL  &= ~GPIO_CRL_CNF6_0; // Default 0x01, clear first bit
    GPIOA->CRL  |= GPIO_CRL_CNF6_1;  // 10: Alternate function output Push-pull
    TIM3->CCMR1 |= TIM_CCMR1_OC1CE; // OC1PE: Output compare 1 preload enable
    TIM3->CCMR1 |= (TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2); // 110: PWM mode 1 - In upcounting, channel 1 is active
    TIM3->CCER  |= TIM_CCER_CC1E; // Capture/Compare 1 output to pin enable
    TIM3->CCER  |= TIM_CCER_CC1P; // Capture/Compare 1 output polarity
    TIM3->PSC    = 0x2; // Prescaler value
    TIM3->ARR    = 0xFFFF; // ARR is the value to be loaded in the actual auto-reload register.
    TIM3->CCR1   = 0xfff; // Capture/Compare 1 value
    TIM3->CR1   |= TIM_CR1_CEN; // Counter enable