Advertisement
kojotuse

nrf24L01p

May 18th, 2014
293
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
C 6.39 KB | None | 0 0
  1. #include <avr/io.h>
  2. #include <stdio.h>
  3. #include <util/delay.h>
  4. #include <avr/interrupt.h>
  5. //#include <avr/pgmspace.h>
  6.  
  7. #include "nRF24L01.h"
  8.  
  9. #define BIT(x) (1 << (x))
  10. #define SETBITS(x,y) ((x) |= (y))
  11. #define CLEARBITS(x,y) ((x) &= (~(y)))
  12. #define SETBIT(x,y) SETBITS((x), (BIT((y))))
  13. #define CLEARBIT(x,y) CLEARBITS((x), (BIT((y))))
  14. #define W 1
  15. #define R 0
  16.  
  17. //#define fosc 8000000 //crystal
  18. #define baud 9600//115200
  19.  
  20. #define PORTCE PORTB
  21. #define PORTCSN PORTB
  22. #define CE 3
  23. #define CSN 4
  24.  
  25. unsigned char *data;
  26.  
  27. void SPI_Init()
  28. {
  29.     //SCK-PB7, MOSI-PB5, CSN-PB4, CE-PB3 ->outputs
  30.     DDRB |= _BV(PB7) | _BV(PB5);
  31.     DDRB &= ~_BV(PB6) ;//& ~_BV(PB4) & ~_BV(PB5) & ~_BV(PB6) & ~_BV(PB7);
  32.     DDRB |= _BV(PB4) | _BV(PB3);
  33.     //SPI enable, master mode, clk/128
  34.     SPCR |= (1<<SPE) | (1<<MSTR) | (1<<SPR1) | (1<<SPR0);
  35.  
  36.     SETBIT(PORTCSN, CSN); //CSN-SS hi
  37.     CLEARBIT(PORTCE, CE); //CE - lo
  38. }
  39.  
  40. unsigned char SPI_WriteByte(unsigned char data)
  41. {
  42.     //load data byte to register
  43.     SPDR = data;
  44.  
  45.     //waiting for transmission end
  46.     while(!(SPSR & (1<<SPIF)));
  47.  
  48.     //return received data
  49.     return SPDR;
  50. }
  51.  
  52. unsigned char GetReg(unsigned char reg)
  53. {
  54.     _delay_us(10); //standard delay
  55.     CLEARBIT(PORTCSN,CSN); //CSN - lo
  56.     _delay_us(10);
  57.     SPI_WriteByte(R_REGISTER + reg); //reading mode + register to read
  58.     _delay_us(10);
  59.     reg = SPI_WriteByte(NOP); //send dummy byte to receive back the first byte in "reg" register
  60.     _delay_us(10);
  61.     SETBIT(PORTCSN,CSN); //CSN-hi
  62.     return reg;
  63. }
  64.  
  65. unsigned char *NrfWriteTo(unsigned char ReadWrite, unsigned char reg, unsigned char *val, unsigned char antVal)
  66. {
  67.     //cli();
  68.  
  69.     //ReadWrite - "R" / "W", reg - register, *val - data package, antVal - number of bytes in package
  70.  
  71.     if(ReadWrite == W)
  72.         reg = W_REGISTER+reg; //write+reg, read-0x00, write 0x20
  73.  
  74.     static unsigned char ret[32]; //array to return
  75.  
  76.     _delay_us(10);
  77.     CLEARBIT(PORTCSN,CSN); //CSN-lo
  78.     _delay_us(10);
  79.     SPI_WriteByte(reg); //ret nrf to R or W mode of reg
  80.     _delay_us(10);
  81.  
  82.     int i;
  83.     for(i=0; i<antVal; i++)
  84.     {
  85.         if(ReadWrite == R && reg != W_TX_PAYLOAD)
  86.         {
  87.             ret[i] = SPI_WriteByte(NOP);
  88.             _delay_us(10);
  89.         }
  90.         else
  91.         {
  92.             SPI_WriteByte(val[i]); //send commands to nrf
  93.             _delay_us(10);
  94.         }
  95.     }
  96.     SETBIT(PORTCSN,CSN); //CSN-hi
  97.  
  98.     //sei();
  99.  
  100.     return ret;
  101. }
  102.  
  103. void Nrf_Init()
  104. {
  105.     _delay_ms(100);
  106.  
  107.     unsigned char val[5];
  108.  
  109.     //EN_AA (enable auto-acknowledgments) - when successfully received transmitter gets automatic response from receiver
  110.     //works only if transmitter and receiver has identical addresses on its channel: RX_ADDR_P0-TX_ADDR
  111.     val[0]=0x01;
  112.     NrfWriteTo(W,EN_AA, val,1);
  113.  
  114.     //delay between retry and number of retries
  115.     val[0]=0x2F; // xxxx yyyy, xxxx=2 - 750us delay, yyyy=F - 15 retries
  116.     NrfWriteTo(W,SETUP_RETR,val,1);
  117.  
  118.     //number of enabled data pipes (1-5)
  119.     val[0]=0x01;
  120.     NrfWriteTo(W,EN_RXADDR,val,1); //enable data pipe 0
  121.  
  122.     //RF_Address width - 1-5 bytes
  123.     val[0]=0x03; // 0000 0011 - 5 bytes ??
  124.     NrfWriteTo(W,SETUP_AW,val,1);
  125.  
  126.     //RF channel setup - 2.400-2.527GHz, 1MHz step
  127.     val[0]=0x01; //0000 0001 -> 2.401 GHz
  128.     NrfWriteTo(W,RF_CH,val,1);
  129.  
  130.     //RF setup - power mode, data speed
  131.     val[0]=0x07; //0000 0111: bit 3=0 1Mbps, bit 2-1 power mode 11 = -0dB, 00 = -18dB
  132.     NrfWriteTo(W,RF_SETUP,val,1);
  133.  
  134.     //RX RF_Address 5 byte, if EN_AA set RX_ADDR_P0 = TX_ADDR
  135.     int i;
  136.     for(i=0; i<5; i++)
  137.         val[i]=0x12;
  138.     NrfWriteTo(W,RX_ADDR_P0,val,5); //pipe 0 address
  139.     //Here you can give different addresses to different channels (if they are enabled in EN_RXADDR) to listen on several different transmitters
  140.  
  141.     //TX RF_Address 5 byte
  142.     for(i=0; i<5; i++)
  143.             val[i]=0x12;
  144.     NrfWriteTo(W,TX_ADDR,val,5);
  145.  
  146.     //Payload width 1-32 byte
  147.     val[0]=5; //5 byte per package
  148.     NrfWriteTo(W,RX_PW_P0,val,1);
  149.  
  150.     //BOOT UP, and choose transmitter or receiver mode
  151.     //
  152.     // bit0 = 0 - transmitter, 1 - receiver
  153.     // bit1 = 1 - power up
  154.     // bit4 = 1 - IRQ-interrupt is not triggered is transmission failed
  155.     //
  156.     // to change transmitter/receiver mode delay(50ms), change mode, delay(50ms)
  157.     //
  158.     val[0]=0x1F; //0001 1111
  159.     NrfWriteTo(W,CONFIG,val,1);
  160.  
  161.     _delay_ms(100); //to reach standby mode, CE-lo
  162. }
  163.  
  164. void PayloadTransmit(unsigned char *buff)
  165. {
  166.     NrfWriteTo(R, FLUSH_TX, buff, 0); //sends 0xE1 to flush registry from old data, buff doesn't care here
  167.     NrfWriteTo(R, W_TX_PAYLOAD, buff, 5); //sends buff to nrf
  168.  
  169.     _delay_ms(10); //need delay after loading nrf with the payload
  170.     SETBIT(PORTCE,CE); //CE-hi transmit data
  171.     _delay_us(20);
  172.     CLEARBIT(PORTCE,CE); //CE-lo stop transmitting
  173.     _delay_ms(10); //delay before proceeding
  174. }
  175.  
  176. void PayloadReceive(void)
  177. {
  178.     SETBIT(PORTCE,CE); //CE-hi
  179.     _delay_ms(1000);
  180.     CLEARBIT(PORTCE,CE);
  181. }
  182.  
  183.  
  184. void reset()
  185. {
  186.     _delay_us(10);
  187.     CLEARBIT(PORTCSN,CSN); //CSN-lo
  188.     _delay_us(10);
  189.     SPI_WriteByte(W_REGISTER + STATUS);
  190.     _delay_us(10);
  191.     SPI_WriteByte(0x70); //reset IRQ in status registry
  192.     _delay_us(10);
  193.     SETBIT(PORTCSN,CSN);
  194. }
  195.  
  196. void Uart0Init(unsigned int baudrate)
  197. {
  198.     //unsigned int ubrr = ((fosc/(16*baudrate))-1);
  199.  
  200.     //Baud rate
  201.     //UBRR0H = (unsigned char)(ubrr>>8);
  202.     //UBRR0L = (unsigned char)ubrr;
  203.  
  204.     UBRRH = 0x00;
  205.     UBRRL = 51;
  206.  
  207.     //Tx EN
  208.     UCSRB = (1<<TXEN) | (1<<RXEN);
  209.  
  210.     //Frame format 8n1
  211.     UCSRC = (1 << URSEL) | (1<<UCSZ1) | (1<<UCSZ0); //URSEL !!!! aby zapisaΔ‡ UCSRC bo ma ten sam adres co UBRRH
  212. }
  213.  
  214. void Uart0Transmit(unsigned char data)
  215. {
  216.     //wait for empty transfer buffer
  217.     while(!(UCSRA & (1<<UDRE)))
  218.         ;
  219.     UDR=data;
  220. }
  221.  
  222. unsigned char  Uart0Receive( void )
  223. {
  224.     /* Wait for data to be received */
  225.     while ( !(UCSRA & (1<<RXC)) );  //This loop is only needed if you not use the interrupt...
  226.     /* Get and return received data from buffer */
  227.     return UDR; //Return the received byte
  228. }
  229.  
  230. int main()
  231. {
  232.     char st;
  233.  
  234.     Uart0Init(baud);
  235.     Uart0Transmit('A');
  236.     SPI_Init();
  237.     //Nrf_Init();
  238.  
  239.     while(1)
  240.     {
  241.         //Uart0Transmit('C');
  242. /*
  243.         PayloadReceive();
  244.         data=NrfWriteTo(R,R_RX_PAYLOAD,data,5);
  245.  
  246.         for(int i =0 ; i<5; i++)
  247.         {
  248.             Uart0Transmit(*(data+i));
  249.         }
  250.  
  251.  
  252.         reset();*/
  253. //      if(but & !but)
  254. //      {
  255. //          PayloadTransmit(&tran);
  256. //      }
  257. //      _but=but;
  258. //      _delay_ms(200);
  259.         //if(GetReg(STATUS)==0x0E)
  260.             //  {
  261.                 //  CLEARBIT(PORTF,3);
  262.                     //PORTA &= ~_BV(PA0);
  263.                     //_delay_ms(200);
  264.             //  }
  265.                 //else
  266.             //  {
  267.                 //  SETBIT(PORTF,3);
  268.                     //PORTA |= _BV(PA0);
  269.                     //_delay_ms(200);
  270.                 //}
  271.         //st=GetReg(STATUS);
  272.         //Uart0Transmit(st);
  273.  
  274.         Uart0Transmit(GetReg(STATUS));
  275.         //Uart0Transmit(*data);
  276.         _delay_ms(1000);
  277.     }
  278.     return 0;
  279. }
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement