Advertisement
Not a member of Pastebin yet?
Sign Up,
it unlocks many cool features!
- #include <avr/io.h>
- #include <stdio.h>
- #include <util/delay.h>
- #include <avr/interrupt.h>
- //#include <avr/pgmspace.h>
- #include "nRF24L01.h"
- #define BIT(x) (1 << (x))
- #define SETBITS(x,y) ((x) |= (y))
- #define CLEARBITS(x,y) ((x) &= (~(y)))
- #define SETBIT(x,y) SETBITS((x), (BIT((y))))
- #define CLEARBIT(x,y) CLEARBITS((x), (BIT((y))))
- #define W 1
- #define R 0
- //#define fosc 8000000 //crystal
- #define baud 9600//115200
- #define PORTCE PORTB
- #define PORTCSN PORTB
- #define CE 3
- #define CSN 4
- unsigned char *data;
- void SPI_Init()
- {
- //SCK-PB7, MOSI-PB5, CSN-PB4, CE-PB3 ->outputs
- DDRB |= _BV(PB7) | _BV(PB5);
- DDRB &= ~_BV(PB6) ;//& ~_BV(PB4) & ~_BV(PB5) & ~_BV(PB6) & ~_BV(PB7);
- DDRB |= _BV(PB4) | _BV(PB3);
- //SPI enable, master mode, clk/128
- SPCR |= (1<<SPE) | (1<<MSTR) | (1<<SPR1) | (1<<SPR0);
- SETBIT(PORTCSN, CSN); //CSN-SS hi
- CLEARBIT(PORTCE, CE); //CE - lo
- }
- unsigned char SPI_WriteByte(unsigned char data)
- {
- //load data byte to register
- SPDR = data;
- //waiting for transmission end
- while(!(SPSR & (1<<SPIF)));
- //return received data
- return SPDR;
- }
- unsigned char GetReg(unsigned char reg)
- {
- _delay_us(10); //standard delay
- CLEARBIT(PORTCSN,CSN); //CSN - lo
- _delay_us(10);
- SPI_WriteByte(R_REGISTER + reg); //reading mode + register to read
- _delay_us(10);
- reg = SPI_WriteByte(NOP); //send dummy byte to receive back the first byte in "reg" register
- _delay_us(10);
- SETBIT(PORTCSN,CSN); //CSN-hi
- return reg;
- }
- unsigned char *NrfWriteTo(unsigned char ReadWrite, unsigned char reg, unsigned char *val, unsigned char antVal)
- {
- //cli();
- //ReadWrite - "R" / "W", reg - register, *val - data package, antVal - number of bytes in package
- if(ReadWrite == W)
- reg = W_REGISTER+reg; //write+reg, read-0x00, write 0x20
- static unsigned char ret[32]; //array to return
- _delay_us(10);
- CLEARBIT(PORTCSN,CSN); //CSN-lo
- _delay_us(10);
- SPI_WriteByte(reg); //ret nrf to R or W mode of reg
- _delay_us(10);
- int i;
- for(i=0; i<antVal; i++)
- {
- if(ReadWrite == R && reg != W_TX_PAYLOAD)
- {
- ret[i] = SPI_WriteByte(NOP);
- _delay_us(10);
- }
- else
- {
- SPI_WriteByte(val[i]); //send commands to nrf
- _delay_us(10);
- }
- }
- SETBIT(PORTCSN,CSN); //CSN-hi
- //sei();
- return ret;
- }
- void Nrf_Init()
- {
- _delay_ms(100);
- unsigned char val[5];
- //EN_AA (enable auto-acknowledgments) - when successfully received transmitter gets automatic response from receiver
- //works only if transmitter and receiver has identical addresses on its channel: RX_ADDR_P0-TX_ADDR
- val[0]=0x01;
- NrfWriteTo(W,EN_AA, val,1);
- //delay between retry and number of retries
- val[0]=0x2F; // xxxx yyyy, xxxx=2 - 750us delay, yyyy=F - 15 retries
- NrfWriteTo(W,SETUP_RETR,val,1);
- //number of enabled data pipes (1-5)
- val[0]=0x01;
- NrfWriteTo(W,EN_RXADDR,val,1); //enable data pipe 0
- //RF_Address width - 1-5 bytes
- val[0]=0x03; // 0000 0011 - 5 bytes ??
- NrfWriteTo(W,SETUP_AW,val,1);
- //RF channel setup - 2.400-2.527GHz, 1MHz step
- val[0]=0x01; //0000 0001 -> 2.401 GHz
- NrfWriteTo(W,RF_CH,val,1);
- //RF setup - power mode, data speed
- val[0]=0x07; //0000 0111: bit 3=0 1Mbps, bit 2-1 power mode 11 = -0dB, 00 = -18dB
- NrfWriteTo(W,RF_SETUP,val,1);
- //RX RF_Address 5 byte, if EN_AA set RX_ADDR_P0 = TX_ADDR
- int i;
- for(i=0; i<5; i++)
- val[i]=0x12;
- NrfWriteTo(W,RX_ADDR_P0,val,5); //pipe 0 address
- //Here you can give different addresses to different channels (if they are enabled in EN_RXADDR) to listen on several different transmitters
- //TX RF_Address 5 byte
- for(i=0; i<5; i++)
- val[i]=0x12;
- NrfWriteTo(W,TX_ADDR,val,5);
- //Payload width 1-32 byte
- val[0]=5; //5 byte per package
- NrfWriteTo(W,RX_PW_P0,val,1);
- //BOOT UP, and choose transmitter or receiver mode
- //
- // bit0 = 0 - transmitter, 1 - receiver
- // bit1 = 1 - power up
- // bit4 = 1 - IRQ-interrupt is not triggered is transmission failed
- //
- // to change transmitter/receiver mode delay(50ms), change mode, delay(50ms)
- //
- val[0]=0x1F; //0001 1111
- NrfWriteTo(W,CONFIG,val,1);
- _delay_ms(100); //to reach standby mode, CE-lo
- }
- void PayloadTransmit(unsigned char *buff)
- {
- NrfWriteTo(R, FLUSH_TX, buff, 0); //sends 0xE1 to flush registry from old data, buff doesn't care here
- NrfWriteTo(R, W_TX_PAYLOAD, buff, 5); //sends buff to nrf
- _delay_ms(10); //need delay after loading nrf with the payload
- SETBIT(PORTCE,CE); //CE-hi transmit data
- _delay_us(20);
- CLEARBIT(PORTCE,CE); //CE-lo stop transmitting
- _delay_ms(10); //delay before proceeding
- }
- void PayloadReceive(void)
- {
- SETBIT(PORTCE,CE); //CE-hi
- _delay_ms(1000);
- CLEARBIT(PORTCE,CE);
- }
- void reset()
- {
- _delay_us(10);
- CLEARBIT(PORTCSN,CSN); //CSN-lo
- _delay_us(10);
- SPI_WriteByte(W_REGISTER + STATUS);
- _delay_us(10);
- SPI_WriteByte(0x70); //reset IRQ in status registry
- _delay_us(10);
- SETBIT(PORTCSN,CSN);
- }
- void Uart0Init(unsigned int baudrate)
- {
- //unsigned int ubrr = ((fosc/(16*baudrate))-1);
- //Baud rate
- //UBRR0H = (unsigned char)(ubrr>>8);
- //UBRR0L = (unsigned char)ubrr;
- UBRRH = 0x00;
- UBRRL = 51;
- //Tx EN
- UCSRB = (1<<TXEN) | (1<<RXEN);
- //Frame format 8n1
- UCSRC = (1 << URSEL) | (1<<UCSZ1) | (1<<UCSZ0); //URSEL !!!! aby zapisaΔ UCSRC bo ma ten sam adres co UBRRH
- }
- void Uart0Transmit(unsigned char data)
- {
- //wait for empty transfer buffer
- while(!(UCSRA & (1<<UDRE)))
- ;
- UDR=data;
- }
- unsigned char Uart0Receive( void )
- {
- /* Wait for data to be received */
- while ( !(UCSRA & (1<<RXC)) ); //This loop is only needed if you not use the interrupt...
- /* Get and return received data from buffer */
- return UDR; //Return the received byte
- }
- int main()
- {
- char st;
- Uart0Init(baud);
- Uart0Transmit('A');
- SPI_Init();
- //Nrf_Init();
- while(1)
- {
- //Uart0Transmit('C');
- /*
- PayloadReceive();
- data=NrfWriteTo(R,R_RX_PAYLOAD,data,5);
- for(int i =0 ; i<5; i++)
- {
- Uart0Transmit(*(data+i));
- }
- reset();*/
- // if(but & !but)
- // {
- // PayloadTransmit(&tran);
- // }
- // _but=but;
- // _delay_ms(200);
- //if(GetReg(STATUS)==0x0E)
- // {
- // CLEARBIT(PORTF,3);
- //PORTA &= ~_BV(PA0);
- //_delay_ms(200);
- // }
- //else
- // {
- // SETBIT(PORTF,3);
- //PORTA |= _BV(PA0);
- //_delay_ms(200);
- //}
- //st=GetReg(STATUS);
- //Uart0Transmit(st);
- Uart0Transmit(GetReg(STATUS));
- //Uart0Transmit(*data);
- _delay_ms(1000);
- }
- return 0;
- }
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement