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Dec 15th, 2018
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  1. void initEMC(void)
  2. {
  3.     initPins();
  4.  
  5.     LPC_SC->PCONP       |= 0x00000800;
  6.      
  7.     LPC_EMC->Control =1;
  8.     LPC_EMC->Config     = 0x00000000;  
  9.  
  10.     EMC_StaMemConfigMW (NAND_CH,EMC_StaticConfig_MW_8BITS);
  11.  
  12.     EMC_StaMemConfigPB(NAND_CH,EMC_StaticConfig_PB);
  13.  
  14.     EMC_SetStaMemoryParameter(NAND_CH, EMC_STA_MEM_WAITWEN, EMC_StaticWaitWen_WAITWEN(0xF));
  15.  
  16.     EMC_SetStaMemoryParameter(NAND_CH, EMC_STA_MEM_WAITOEN, EMC_StaticWaitOen_WAITOEN(0xF));
  17.  
  18.     EMC_SetStaMemoryParameter(NAND_CH, EMC_STA_MEM_WAITRD, EMC_StaticWaitRd_WAITRD(0x1F));
  19.  
  20.     EMC_SetStaMemoryParameter(NAND_CH, EMC_STA_MEM_WAITPAGE, EMC_StaticwaitPage_WAITPAGE(0x1F));
  21.  
  22.     EMC_SetStaMemoryParameter(NAND_CH, EMC_STA_MEM_WAITWR, EMC_StaticWaitwr_WAITWR(0x1F));
  23.  
  24.     EMC_SetStaMemoryParameter(NAND_CH, EMC_STA_MEM_WAITTURN, EMC_StaticWaitTurn_WAITTURN(0x1F));
  25.  
  26.     delayMs(0, 10);
  27. }
  28.  
  29. void NandFlash_WaitForReady( void )
  30. {
  31.     u32 i;
  32.  
  33.     //while( FIO2PIN & (1 << 29) );     /* from high to low once */
  34.  
  35.     while( !(FIO2PIN & (1 << 29)) );
  36.  
  37.     return;
  38. }
  39.  
  40. Bool NandFlash_PageProgram( u32 pageNum, u32 blockNum, u8 *bufPtr )
  41. {
  42.     volatile u8 *pCLE = K9F1G_CLE;
  43.     volatile u8 *pALE = K9F1G_ALE;
  44.     volatile u8 *pDATA = K9F1G_DATA;
  45.     u32 i, curAddr, curColumm;
  46.  
  47.     curAddr = NANDFLASH_BASE_ADDR + blockNum * NANDFLASH_BLOCK_FSIZE
  48.                                 + pageNum * NANDFLASH_PAGE_FSIZE;
  49.  
  50.     curColumm = curAddr % NANDFLASH_PAGE_FSIZE;
  51.     curAddr -= curColumm;
  52.  
  53.     *pCLE = K9FXX_BLOCK_PROGRAM_1;
  54.  
  55.     *pALE =  (u8)(curColumm & 0x000000FF);      /* column address low */
  56.  
  57.     *pALE = (u8)((curColumm & 0x00000F00) >> 8);    /* column address high */
  58.  
  59.     *pALE = (u8)((curAddr & 0x00FF0000) >> 16); /* row address low */
  60.  
  61.     *pALE = (u8)((curAddr & 0xFF000000) >> 24); /* row address high */
  62.  
  63.     //Not write to spare area for the NandFlash valid block checking
  64.     for ( i = 0; i < NANDFLASH_RW_PAGE_SIZE; i++ )
  65.     {
  66.         *pDATA = *bufPtr++;
  67.     }
  68.  
  69.     *pCLE = K9FXX_BLOCK_PROGRAM_2;
  70.  
  71.     NandFlash_WaitForReady();
  72.  
  73.     return( NandFlash_ReadStatus( K9FXX_BLOCK_PROGRAM_1 ) );
  74. }
  75.  
  76. Bool NandFlash_BlockErase( u32 blockNum )
  77. {
  78.     volatile u8 *pCLE = K9F1G_CLE;
  79.     volatile u8 *pALE = K9F1G_ALE;
  80.     u32 rowAddr;
  81.  
  82.     rowAddr = (NANDFLASH_BASE_ADDR + blockNum * NANDFLASH_BLOCK_FSIZE);
  83.     rowAddr = rowAddr - (rowAddr % NANDFLASH_BLOCK_FSIZE);
  84.  
  85.     *pCLE = K9FXX_BLOCK_ERASE_1;
  86.  
  87.     *pALE = (u8)(rowAddr & 0x00FF);         /* column address low */
  88.  
  89.     *pALE = (u8)((rowAddr & 0xFF00) >> 8);  /* column address high */
  90.  
  91.     *pCLE = K9FXX_BLOCK_ERASE_2;
  92.  
  93.     NandFlash_WaitForReady();
  94.  
  95.     return(NandFlash_ReadStatus(K9FXX_BLOCK_ERASE_1));
  96. }
  97.  
  98. void NandFlash_Reset( void )
  99. {
  100.     volatile u8 *pCLE;
  101.  
  102.     /* Reset NAND FLASH  through NAND FLASH command */
  103.     pCLE = K9F1G_CLE;
  104.     *pCLE = K9FXX_RESET;
  105.  
  106.     delayMs(0, 2);
  107.     return;
  108. }
  109.  
  110. int NandFlash_ReadFromAddr(u32 addrInWholeNand, u8* bufPtr, u32 size)
  111. {
  112.     volatile u8 *pCLE = K9F1G_CLE;
  113.     volatile u8 *pALE = K9F1G_ALE;
  114.     volatile u8 *pDATA = K9F1G_DATA;
  115.     u32 i = 0, curColumm, curRow;
  116.  
  117.     curColumm = addrInWholeNand % NANDFLASH_PAGE_FSIZE;
  118.     curRow = addrInWholeNand - curColumm;
  119.  
  120.     *pCLE = K9FXX_READ_1;
  121.  
  122.     *pALE = (u8)(curColumm & 0x000000FF);               /* column address low */
  123.  
  124.     *pALE = (u8)((curColumm & 0x00000F00) >> 8);  /* column address high */
  125.  
  126.     *pALE = (u8)((curRow & 0x00FF0000) >> 16);    /* row address low */
  127.  
  128.     *pALE = (u8)((curRow & 0xFF000000) >> 24);    /* row address high */
  129.  
  130.     *pCLE = K9FXX_READ_2;
  131.  
  132.     NandFlash_WaitForReady();
  133.  
  134.     //Get data from the current address in the page til the end of the page
  135.     for ( i = 0; i < (NANDFLASH_PAGE_FSIZE - curColumm); i++ )
  136.     {
  137.         *bufPtr = *pDATA;
  138.  
  139.         bufPtr++;
  140.  
  141.         if((i + 1) >= size)
  142.             break;
  143.     }
  144.  
  145.     // Ok, return
  146.     return i;
  147. }
  148.  
  149. int NandFlash_PageReadFromAddr(u32 blockNum, u32 pageNum,
  150.                                             u32 addrInPage, u8* bufPtr, u32 size)
  151. {
  152.     u32 curAddr = 0;
  153.  
  154.     curAddr += NANDFLASH_BASE_ADDR + blockNum * NANDFLASH_BLOCK_FSIZE;
  155.  
  156.     curAddr += pageNum * NANDFLASH_PAGE_FSIZE;
  157.  
  158.     curAddr += addrInPage;
  159.  
  160.     return (NandFlash_ReadFromAddr(curAddr, bufPtr, size));
  161. }
  162.  
  163. int NandFlash_PageReadFromBeginning(u32 blockNum, u32 pageNum, u8* bufPtr)
  164. {
  165.     return (NandFlash_PageReadFromAddr(blockNum, pageNum, 0, bufPtr, NANDFLASH_PAGE_FSIZE));
  166. }
  167.  
  168. u32 NandFlash_ReadId( void )
  169. {
  170.     u8 a, b, c, d;
  171.     volatile u8 *pCLE = K9F1G_CLE;
  172.     volatile u8 *pALE = K9F1G_ALE;
  173.     volatile u8 *pDATA = K9F1G_DATA;
  174.  
  175.     *pCLE = K9FXX_READ_ID;
  176.     *pALE = 0;
  177.  
  178.     a = *pDATA;
  179.     a = *pDATA;
  180.     b = *pDATA;
  181.     c = *pDATA;
  182.     d = *pDATA;
  183.    
  184.     return ((a << 24) | (b << 16) | (c << 8) | d);
  185. }
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