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si2165.c Patch - HVR-5500 - DVB-C -

beta990
Apr 19th, 2015
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  1. diff --git a/drivers/media/dvb-frontends/si2165.c
  2. b/drivers/media/dvb-frontends/si2165.c
  3. index 4cc5d10..d283d68 100644
  4. --- a/drivers/media/dvb-frontends/si2165.c
  5. +++ b/drivers/media/dvb-frontends/si2165.c
  6. @@ -704,7 +704,7 @@ static int si2165_read_status(struct dvb_frontend
  7. *fe, fe_status_t *status)
  8.   u8 fec_lock = 0;
  9.   struct si2165_state *state = fe->demodulator_priv;
  10.  
  11. - if (!state->has_dvbt)
  12. + if (!state->has_dvbt || !state->has_dvbc)
  13.   return -EINVAL;
  14.  
  15.   /* check fec_lock */
  16. @@ -777,131 +777,272 @@ static int si2165_set_parameters(struct
  17. dvb_frontend *fe)
  18.   return -EINVAL;
  19.   }
  20.  
  21. - if (!state->has_dvbt)
  22. + if (!state->has_dvbt || !state->has_dvbc)
  23.   return -EINVAL;
  24.  
  25. - if (p->bandwidth_hz > 0) {
  26. - dvb_rate = p->bandwidth_hz * 8 / 7;
  27. - bw10k = p->bandwidth_hz / 10000;
  28. - } else {
  29. - dvb_rate = 8 * 8 / 7;
  30. - bw10k = 800;
  31. - }
  32. + if (p->delivery_system == SYS_DVBT) {
  33. + if (p->bandwidth_hz > 0) {
  34. + dvb_rate = p->bandwidth_hz * 8 / 7;
  35. + bw10k = p->bandwidth_hz / 10000;
  36. + } else {
  37. + dvb_rate = 8 * 8 / 7;
  38. + bw10k = 800;
  39. + }
  40.  
  41. - /* standard = DVB-T */
  42. - ret = si2165_writereg8(state, 0x00ec, 0x01);
  43. - if (ret < 0)
  44. - return ret;
  45. - ret = si2165_adjust_pll_divl(state, 12);
  46. - if (ret < 0)
  47. - return ret;
  48. + /* DVB-T */
  49. + ret = si2165_writereg8(state, 0x00ec, 0x01);
  50. + if (ret < 0)
  51. + return ret;
  52. + ret = si2165_adjust_pll_divl(state, 12);
  53. + if (ret < 0)
  54. + return ret;
  55.  
  56. - fe->ops.tuner_ops.get_if_frequency(fe, &IF);
  57. - ret = si2165_set_if_freq_shift(state, IF);
  58. - if (ret < 0)
  59. - return ret;
  60. - ret = si2165_writereg8(state, 0x08f8, 0x00);
  61. - if (ret < 0)
  62. - return ret;
  63. - /* ts output config */
  64. - ret = si2165_writereg8(state, 0x04e4, 0x20);
  65. - if (ret < 0)
  66. - return ret;
  67. - ret = si2165_writereg16(state, 0x04ef, 0x00fe);
  68. - if (ret < 0)
  69. - return ret;
  70. - ret = si2165_writereg24(state, 0x04f4, 0x555555);
  71. - if (ret < 0)
  72. - return ret;
  73. - ret = si2165_writereg8(state, 0x04e5, 0x01);
  74. - if (ret < 0)
  75. - return ret;
  76. - /* bandwidth in 10KHz steps */
  77. - ret = si2165_writereg16(state, 0x0308, bw10k);
  78. - if (ret < 0)
  79. - return ret;
  80. - ret = si2165_set_oversamp(state, dvb_rate);
  81. - if (ret < 0)
  82. - return ret;
  83. - /* impulsive_noise_remover */
  84. - ret = si2165_writereg8(state, 0x031c, 0x01);
  85. - if (ret < 0)
  86. - return ret;
  87. - ret = si2165_writereg8(state, 0x00cb, 0x00);
  88. - if (ret < 0)
  89. - return ret;
  90. - /* agc2 */
  91. - ret = si2165_writereg8(state, 0x016e, 0x41);
  92. - if (ret < 0)
  93. - return ret;
  94. - ret = si2165_writereg8(state, 0x016c, 0x0e);
  95. - if (ret < 0)
  96. - return ret;
  97. - ret = si2165_writereg8(state, 0x016d, 0x10);
  98. - if (ret < 0)
  99. - return ret;
  100. - /* agc */
  101. - ret = si2165_writereg8(state, 0x015b, 0x03);
  102. - if (ret < 0)
  103. - return ret;
  104. - ret = si2165_writereg8(state, 0x0150, 0x78);
  105. - if (ret < 0)
  106. - return ret;
  107. - /* agc */
  108. - ret = si2165_writereg8(state, 0x01a0, 0x78);
  109. - if (ret < 0)
  110. - return ret;
  111. - ret = si2165_writereg8(state, 0x01c8, 0x68);
  112. - if (ret < 0)
  113. - return ret;
  114. - /* freq_sync_range */
  115. - ret = si2165_writereg16(state, 0x030c, 0x0064);
  116. - if (ret < 0)
  117. - return ret;
  118. - /* gp_reg0 */
  119. - ret = si2165_readreg8(state, 0x0387, val);
  120. - if (ret < 0)
  121. - return ret;
  122. - ret = si2165_writereg8(state, 0x0387, 0x00);
  123. - if (ret < 0)
  124. - return ret;
  125. - /* dsp_addr_jump */
  126. - ret = si2165_writereg32(state, 0x0348, 0xf4000000);
  127. - if (ret < 0)
  128. - return ret;
  129. + fe->ops.tuner_ops.get_if_frequency(fe, &IF);
  130. + ret = si2165_set_if_freq_shift(state, IF);
  131. + if (ret < 0)
  132. + return ret;
  133. + ret = si2165_writereg8(state, 0x08f8, 0x00);
  134. + if (ret < 0)
  135. + return ret;
  136. + /* ts output config */
  137. + ret = si2165_writereg8(state, 0x04e4, 0x20);
  138. + if (ret < 0)
  139. + return ret;
  140. + ret = si2165_writereg16(state, 0x04ef, 0x00fe);
  141. + if (ret < 0)
  142. + return ret;
  143. + ret = si2165_writereg24(state, 0x04f4, 0x555555);
  144. + if (ret < 0)
  145. + return ret;
  146. + ret = si2165_writereg8(state, 0x04e5, 0x01);
  147. + if (ret < 0)
  148. + return ret;
  149. + /* bandwidth in 10KHz steps */
  150. + ret = si2165_writereg16(state, 0x0308, bw10k);
  151. + if (ret < 0)
  152. + return ret;
  153. + ret = si2165_set_oversamp(state, dvb_rate);
  154. + if (ret < 0)
  155. + return ret;
  156. + /* impulsive_noise_remover */
  157. + ret = si2165_writereg8(state, 0x031c, 0x01);
  158. + if (ret < 0)
  159. + return ret;
  160. + ret = si2165_writereg8(state, 0x00cb, 0x00);
  161. + if (ret < 0)
  162. + return ret;
  163. + /* agc2 */
  164. + ret = si2165_writereg8(state, 0x016e, 0x41);
  165. + if (ret < 0)
  166. + return ret;
  167. + ret = si2165_writereg8(state, 0x016c, 0x0e);
  168. + if (ret < 0)
  169. + return ret;
  170. + ret = si2165_writereg8(state, 0x016d, 0x10);
  171. + if (ret < 0)
  172. + return ret;
  173. + /* agc */
  174. + ret = si2165_writereg8(state, 0x015b, 0x03);
  175. + if (ret < 0)
  176. + return ret;
  177. + ret = si2165_writereg8(state, 0x0150, 0x78);
  178. + if (ret < 0)
  179. + return ret;
  180. + /* agc */
  181. + ret = si2165_writereg8(state, 0x01a0, 0x78);
  182. + if (ret < 0)
  183. + return ret;
  184. + ret = si2165_writereg8(state, 0x01c8, 0x68);
  185. + if (ret < 0)
  186. + return ret;
  187. + /* freq_sync_range */
  188. + ret = si2165_writereg16(state, 0x030c, 0x0064);
  189. + if (ret < 0)
  190. + return ret;
  191. + /* gp_reg0 */
  192. + ret = si2165_readreg8(state, 0x0387, val);
  193. + if (ret < 0)
  194. + return ret;
  195. + ret = si2165_writereg8(state, 0x0387, 0x00);
  196. + if (ret < 0)
  197. + return ret;
  198. + /* dsp_addr_jump */
  199. + ret = si2165_writereg32(state, 0x0348, 0xf4000000);
  200. + if (ret < 0)
  201. + return ret;
  202.  
  203. - if (fe->ops.tuner_ops.set_params)
  204. - fe->ops.tuner_ops.set_params(fe);
  205. + if (fe->ops.tuner_ops.set_params)
  206. + fe->ops.tuner_ops.set_params(fe);
  207.  
  208. - /* recalc if_freq_shift if IF might has changed */
  209. - fe->ops.tuner_ops.get_if_frequency(fe, &IF);
  210. - ret = si2165_set_if_freq_shift(state, IF);
  211. - if (ret < 0)
  212. - return ret;
  213. + /* recalc if_freq_shift if IF might has changed */
  214. + fe->ops.tuner_ops.get_if_frequency(fe, &IF);
  215. + ret = si2165_set_if_freq_shift(state, IF);
  216. + if (ret < 0)
  217. + return ret;
  218.  
  219. - /* boot/wdog status */
  220. - ret = si2165_readreg8(state, 0x0341, val);
  221. - if (ret < 0)
  222. - return ret;
  223. - ret = si2165_writereg8(state, 0x0341, 0x00);
  224. - if (ret < 0)
  225. - return ret;
  226. - /* reset all */
  227. - ret = si2165_writereg8(state, 0x00c0, 0x00);
  228. - if (ret < 0)
  229. - return ret;
  230. - /* gp_reg0 */
  231. - ret = si2165_writereg32(state, 0x0384, 0x00000000);
  232. - if (ret < 0)
  233. - return ret;
  234. - /* start_synchro */
  235. - ret = si2165_writereg8(state, 0x02e0, 0x01);
  236. - if (ret < 0)
  237. - return ret;
  238. - /* boot/wdog status */
  239. - ret = si2165_readreg8(state, 0x0341, val);
  240. - if (ret < 0)
  241. - return ret;
  242. + /* boot/wdog status */
  243. + ret = si2165_readreg8(state, 0x0341, val);
  244. + if (ret < 0)
  245. + return ret;
  246. + ret = si2165_writereg8(state, 0x0341, 0x00);
  247. + if (ret < 0)
  248. + return ret;
  249. + /* reset all */
  250. + ret = si2165_writereg8(state, 0x00c0, 0x00);
  251. + if (ret < 0)
  252. + return ret;
  253. + /* gp_reg0 */
  254. + ret = si2165_writereg32(state, 0x0384, 0x00000000);
  255. + if (ret < 0)
  256. + return ret;
  257. + /* start_synchro */
  258. + ret = si2165_writereg8(state, 0x02e0, 0x01);
  259. + if (ret < 0)
  260. + return ret;
  261. + /* boot/wdog status */
  262. + ret = si2165_readreg8(state, 0x0341, val);
  263. + if (ret < 0)
  264. + return ret;
  265. + }
  266. + else if (p->delivery_system == SYS_DVBC_ANNEX_A) {
  267. + /* DVB-C */
  268. +        ret = si2165_writereg8(state, 0x00ec, 0x05);
  269. +        if (ret < 0)
  270. +                return ret;
  271. +        ret = si2165_adjust_pll_divl(state, 14);
  272. +        if (ret < 0)
  273. +                return ret;
  274. +
  275. +        fe->ops.tuner_ops.get_if_frequency(fe, &IF);
  276. + ret = si2165_set_if_freq_shift(state, IF);
  277. + if (ret < 0)
  278. + return ret;
  279. + ret = si2165_writereg8(state, 0x08f8, 0x00);
  280. + if (ret < 0)
  281. + return ret;
  282. +
  283. + /* ts output config */
  284. +        ret = si2165_writereg8(state, 0x04e4, 0x20);
  285. +        if (ret < 0)
  286. +                return ret;
  287. +        ret = si2165_writereg16(state, 0x04ef, 0x00fe);
  288. +        if (ret < 0)
  289. +                return ret;
  290. +        ret = si2165_writereg24(state, 0x04f4, 0x555555);
  291. +        if (ret < 0)
  292. +                return ret;
  293. +        ret = si2165_writereg8(state, 0x04e5, 0x01);
  294. +        if (ret < 0)
  295. +                return ret;
  296. + /* bandwidth */
  297. + ret = si2165_writereg32(state, 0x00e4, 0x040ed730); // or 0x0494f77e
  298. +        if (ret < 0)
  299. +                return ret;
  300. + /* impulsive_noise_remover */
  301. + ret = si2165_writereg8(state, 0x031c, 0x01);
  302. + if (ret < 0)
  303. + return ret;
  304. + ret = si2165_writereg8(state, 0x00cb, 0x00);
  305. + if (ret < 0)
  306. + return ret;
  307. + /* agc2 */
  308. +        ret = si2165_writereg8(state, 0x016e, 0x50);
  309. +        if (ret < 0)
  310. +                return ret;
  311. +        ret = si2165_writereg8(state, 0x016c, 0x0e);
  312. +        if (ret < 0)
  313. +                return ret;
  314. +        ret = si2165_writereg8(state, 0x016d, 0x10);
  315. +        if (ret < 0)
  316. +                return ret;
  317. + /* agc */
  318. +        ret = si2165_writereg8(state, 0x015b, 0x03);
  319. +        if (ret < 0)
  320. +                return ret;
  321. +        ret = si2165_writereg8(state, 0x0150, 0x68);
  322. +        if (ret < 0)
  323. +                return ret;
  324. + /* agc */
  325. + ret = si2165_writereg8(state, 0x01a0, 0x68);
  326. +        if (ret < 0)
  327. +                return ret;
  328. +        ret = si2165_writereg8(state, 0x01c8, 0x50);
  329. +        if (ret < 0)
  330. +                return ret;
  331. + /* freq_sync_range */
  332. + ret = si2165_writereg16(state, 0x030c, 0x0064);
  333. + if (ret < 0)
  334. + return ret;
  335. + /* gp_reg0 */
  336. +        ret = si2165_readreg8(state, 0x0278, val); /* returned 0x0d */
  337. +        if (ret < 0)
  338. +                return ret;
  339. +        ret = si2165_writereg8(state, 0x0278, 0x0d);
  340. +        if (ret < 0)
  341. +                return ret;
  342. + /* dsp_addr_jump */
  343. + ret = si2165_writereg32(state, 0x0348, 0xf4000000);
  344. + if (ret < 0)
  345. + return ret;
  346. + /* ?? */
  347. + ret = si2165_writereg8(state, 0x023a, 0x05);
  348. +        if (ret < 0)
  349. +                return ret;
  350. +        ret = si2165_writereg8(state, 0x0261, 0x09);
  351. +        if (ret < 0)
  352. +                return ret;
  353. +        ret = si2165_writereg16(state, 0x0350, 0x3e80);
  354. +        if (ret < 0)
  355. +                return ret;
  356. + ret = si2165_writereg32(state, 0x00c4, 0x007a1200);
  357. +        if (ret < 0)
  358. +                return ret;
  359. +        ret = si2165_writereg16(state, 0x024c, 0x0000);
  360. +        if (ret < 0)
  361. +                return ret;
  362. +        ret = si2165_writereg16(state, 0x027c, 0x0000);
  363. +        if (ret < 0)
  364. +                return ret;
  365. +        ret = si2165_writereg8(state, 0x0232, 0x03);
  366. +        if (ret < 0)
  367. +                return ret;
  368. +        ret = si2165_writereg8(state, 0x02f4, 0x0b);
  369. +        if (ret < 0)
  370. +                return ret;
  371. +
  372. +        if (fe->ops.tuner_ops.set_params)
  373. +                fe->ops.tuner_ops.set_params(fe);
  374. +
  375. +        /* recalc if_freq_shift if IF might has changed */
  376. +        fe->ops.tuner_ops.get_if_frequency(fe, &IF);
  377. +        ret = si2165_set_if_freq_shift(state, IF);
  378. +        if (ret < 0)
  379. +                return ret;
  380. +
  381. + /* boot/wdog status */
  382. +        ret = si2165_readreg8(state, 0x0341, val);
  383. +        if (ret < 0)
  384. +                return ret;
  385. +        ret = si2165_writereg8(state, 0x0341, 0x00);
  386. +        if (ret < 0)
  387. +                return ret;
  388. + /* reset all */
  389. +        ret = si2165_writereg8(state, 0x00c0, 0x00);
  390. +        if (ret < 0)
  391. +                return ret;
  392. + /* gp_reg0 */
  393. +        ret = si2165_writereg32(state, 0x0384, 0x00000000);
  394. +        if (ret < 0)
  395. +                return ret;
  396. + /* start_synchro */
  397. +        ret = si2165_writereg8(state, 0x02e0, 0x01);
  398. +        if (ret < 0)
  399. +                return ret;
  400. + /* boot/wdog status */
  401. + ret = si2165_readreg8(state, 0x0341, val);
  402. + if (ret < 0)
  403. + return ret;
  404. + }
  405.  
  406.   return 0;
  407.  }
  408. @@ -917,6 +1058,9 @@ static void si2165_release(struct dvb_frontend *fe)
  409.  static struct dvb_frontend_ops si2165_ops = {
  410.   .info = {
  411.   .name = "Silicon Labs ",
  412. + /* For DVB-C */
  413. + .symbol_rate_min = 870000,
  414. + .symbol_rate_max = 11700000,
  415.   .caps = FE_CAN_FEC_1_2 |
  416.   FE_CAN_FEC_2_3 |
  417.   FE_CAN_FEC_3_4 |
  418. @@ -934,7 +1078,6 @@ static struct dvb_frontend_ops si2165_ops = {
  419.   FE_CAN_GUARD_INTERVAL_AUTO |
  420.   FE_CAN_HIERARCHY_AUTO |
  421.   FE_CAN_MUTE_TS |
  422. - FE_CAN_TRANSMISSION_MODE_AUTO |
  423.   FE_CAN_RECOVER
  424.   },
  425.  
  426. @@ -1043,8 +1186,9 @@ struct dvb_frontend *si2165_attach(const struct
  427. si2165_config *config,
  428.   sizeof(state->frontend.ops.info.name));
  429.   }
  430.   if (state->has_dvbc)
  431. - dev_warn(&state->i2c->dev, "%s: DVB-C is not yet supported.\n",
  432. -       KBUILD_MODNAME);
  433. + state->frontend.ops.delsys[n++] = SYS_DVBC_ANNEX_A;
  434. + strlcat(state->frontend.ops.info.name, " DVB-C",
  435. + sizeof(state->frontend.ops.info.name));
  436.  
  437.   return &state->frontend;
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