/dts-v1/;
#include "imx6q.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>


/ {
    ...

    aliases {
        mxcfb0 = &mxcfb1;
        mxcfb2 = &mxcfb3;
    };

    ...


    backlight_lvds: backlight-lvds {
        compatible = "pwm-backlight";
        pwms = <&pwm1 0 55555>;
        brightness-levels = <
            0 3 8 9 11 13 16 18 21 23 26 29 31 34 36 39 41 44 46 49 51
            54 57 59 62 64 67 69 72 74 77 80 82 85 87 90 92 95 97 100 102
            105 108 110 113 115 118 120 123 125 128 131 133 136 138 141 143
            146 148 151 153 156 159 161 164 166 169 171 174 176 179 182 184
            187 189 192 194 197 199 202 204 207 210 212 215 217 220 222 225
            227 230 233 235 238 240 243 245 248 250 253 255
        >;
        default-brightness-level = <0>;
        enable-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>;
        status = "okay";
    };

    backlight_lcd: backlight-lcd {
        compatible = "pwm-backlight";
        pwms = <&pwm4 0 55555>;
        brightness-levels = <
            0 3 8 9 11 13 16 18 21 23 26 29 31 34 36 39 41 44 46 49 51
            54 57 59 62 64 67 69 72 74 77 80 82 85 87 90 92 95 97 100 102
            105 108 110 113 115 118 120 123 125 128 131 133 136 138 141 143
            146 148 151 153 156 159 161 164 166 169 171 174 176 179 182 184
            187 189 192 194 197 199 202 204 207 210 212 215 217 220 222 225
            227 230 233 235 238 240 243 245 248 250 253 255
        >;
        default-brightness-level = <0>;
        enable-gpios = <&gpio3 6 GPIO_ACTIVE_HIGH>;
        status = "okay";
    };

    mxcfb1: fb@0 {
        compatible = "fsl,mxc_sdc_fb";
        disp_dev = "ldb";
        interface_pix_fmt = "RGB24";
        default_bpp = <32>;
        int_clk = <0>;
        late_init = <0>;
        status = "okay";
    };

    mxcfb3: fb@2 {
        compatible = "fsl,mxc_sdc_fb";
        disp_dev = "lcd";
        interface_pix_fmt = "RGB24";
        mode_str ="CLAA-WVGA";
        default_bpp = <32>;
        int_clk = <0>;
        late_init = <0>;
        status = "okay";
    };

    lcd@0 {
        compatible = "fsl,lcd";
        ipu_id = <0>;
        disp_id = <0>;
        default_ifmt = "RGB24";
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_ipu1>;
        status = "okay";
    };

    v4l2_cap_0 {
        compatible = "fsl,imx6q-v4l2-capture";
        ipu_id = <0>;
        csi_id = <0>;
        mclk_source = <0>;
        status = "disable";
    };

    v4l2_cap_1 {
        compatible = "fsl,imx6q-v4l2-capture";
        ipu_id = <0>;
        csi_id = <1>;
        mclk_source = <0>;
        status = "disable";
    };

    v4l2_out {
        compatible = "fsl,mxc_v4l2_output";
        status = "okay";
    };

...

};



&ldb {
    status = "okay";

    lvds-channel@0 {
        status = "disabled";
    };


    lvds-channel@1 {
        fsl,data-mapping = "spwg";
        fsl,data-width = <24>;
        crtc = "ipu1-di1";
        primary;
        status = "okay";

        display-timings {
            native-mode = <&timing0>;
            timing0: timing0 {
                clock-frequency = <27000000>;
                hactive = <800>;
                vactive = <480>;
                hfront-porch = <44>;
                hback-porch = <16>;
                vfront-porch = <43>;
                vback-porch = <5>;
                hsync-len = <2>;
                vsync-len = <2>;
                de-active = <1>;
            };
        };
    };
};

&ecspi3 {
    status = "disabled";
};

&dcic2 {
    dcic_id = <1>;
    dcic_mux = "dcic-lvds1";
    status = "disabled";
};

...

&iomuxc {

    ...

    ipu1 {
        pinctrl_ipu1: ipu1grp-1 {
            fsl,pins = <
                MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
                MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
                MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
                MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
                MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04        0x80000000
                MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
                MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
                MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
                MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
                MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
                MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
                MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
                MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
                MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
                MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
                MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
                MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
                MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
                MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
                MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
                MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
                MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
                MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
                MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
                MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
                MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
                MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
                MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
                MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
            >;
        };
    };

    ...

};