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MMU.c

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Nov 14th, 2015
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  1. void MMU_reset() {
  2.     int i;
  3.     for(i=0; i<8192; i++) {
  4.       MMU_wram[i] = 0;
  5.       MMU_eram[i] = 0;
  6.     }
  7.     for(i=0; i<127; i++) {
  8.       MMU_zram[i] = 0;
  9.     }
  10.     MMU_inbios=1;
  11.     MMU_ie=0;
  12.     MMU_if=0;
  13.  };
  14.  
  15. int MMU_rw(int addr) { return MMU_rb(addr)+(MMU_rb(addr+1)<<8); };
  16.  
  17. void MMU_wb(int addr, int val) {
  18.     switch(addr&0xF000)
  19.     {
  20.       // ROM bank 0
  21.       case 0x0000:
  22.         if(MMU_inbios && addr<0x0100) return;
  23.     // fall through
  24.       case 0x1000:
  25.       case 0x2000:
  26.       case 0x3000:
  27.         break;
  28.  
  29.       // ROM bank 1
  30.       case 0x4000: case 0x5000: case 0x6000: case 0x7000:
  31.         break;
  32.  
  33.       // VRAM
  34.       case 0x8000: case 0x9000:
  35.         GPU_vram[addr&0x1FFF] = val;
  36.     GPU_updatetile(addr&0x1FFF, val);
  37.     break;
  38.  
  39.       // External RAM
  40.       case 0xA000: case 0xB000:
  41.         MMU_eram[addr&0x1FFF] = val;
  42.     break;
  43.  
  44.       // Work RAM and echo
  45.       case 0xC000: case 0xD000: case 0xE000:
  46.         MMU_wram[addr&0x1FFF] = val;
  47.     break;
  48.  
  49.       // Everything else
  50.       case 0xF000:
  51.         switch(addr&0x0F00)
  52.     {
  53.       // Echo RAM
  54.       case 0x000: case 0x100: case 0x200: case 0x300:
  55.       case 0x400: case 0x500: case 0x600: case 0x700:
  56.       case 0x800: case 0x900: case 0xA00: case 0xB00:
  57.       case 0xC00: case 0xD00:
  58.         MMU_wram[addr&0x1FFF] = val;
  59.         break;
  60.  
  61.           // OAM
  62.       case 0xE00:
  63.         if((addr&0xFF)<0xA0) GPU_oam[addr&0xFF] = val;
  64.         GPU_updateoam(addr,val);
  65.         break;
  66.  
  67.           // Zeropage RAM, I/O
  68.       case 0xF00:
  69.         if(addr > 0xFF7F) { MMU_zram[addr&0x7F]=val; }
  70.         else switch(addr&0xF0)
  71.         {
  72.         }
  73.     }
  74.     break;
  75.     }
  76. };
  77.  
  78. void MMU_ww(int addr, int val) { MMU_wb(addr,val&255); MMU_wb(addr+1,val>>8); };
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