rorod8

ram

Nov 25th, 2020
805
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  1. library ieee;
  2. use ieee.std_logic_1164.all;
  3. use ieee.std_logic_unsigned.all;
  4. use IEEE.numeric_std.all;
  5.  
  6. entity ramem is
  7.     port
  8.     (    
  9.         RW        : in std_logic;
  10.         RE        : in std_logic;
  11.        
  12.         clk    : in std_logic;
  13.         data    : in std_logic_vector(15 downto 0);
  14.         addr    : in std_logic_vector(3 downto 0);
  15.            
  16.         q        : out std_logic_vector(15 downto 0)
  17.     );
  18.    
  19. end ramem;
  20.  
  21. architecture rtl of ramem is
  22.  
  23.     -- Build a 2-D array type for the RAM
  24.    
  25.     type RAM is array(15 downto 0) of std_logic_vector(15 downto 0);
  26.     signal memory : RAM:= (others => X"0000");
  27.     signal lastButtonState1    : std_logic := '0';
  28.     signal lastButtonState2    : std_logic := '0';
  29.    
  30.  
  31. begin
  32.  
  33. process(clk)
  34.     begin
  35.         if(rising_edge(clk))  then
  36.             if(RE='1' and lastButtonState1='0') then
  37.                 memory <= ("0000000000000000",
  38.                               "0000000000000000",
  39.                               "0000000000000000",
  40.                               "0000000000000000",
  41.                               "0000000000000000",
  42.                               "0000000000000000",
  43.                               "0000000000000000",
  44.                               "0000000000000000",
  45.                               "0000000000000000",
  46.                               "0000000000000000",
  47.                               "0000000000000000",
  48.                               "0000000000000000",
  49.                               "0000000000000000",
  50.                               "0000000000000000",
  51.                               "0000000000000000",
  52.                               "0000000000000000");
  53.             elsif(RW='1' and lastButtonState2='0') then
  54.                 memory(to_integer(unsigned(addr))) <= data;
  55.             end if;
  56.             lastButtonState1 <= RE;
  57.             lastButtonState2 <= RW;
  58.             q <= memory(to_integer(unsigned(addr)));
  59.         end if;
  60.    
  61. end process;
  62.    
  63.    
  64.    
  65. end rtl;
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