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  1. // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2. /*
  3. * Copyright (c) 2016-2017 Fuzhou Rockchip Electronics Co., Ltd
  4. */
  5.  
  6. / {
  7. cluster0_opp: opp-table-0 {
  8. compatible = "operating-points-v2";
  9. opp-shared;
  10.  
  11. opp00 {
  12. opp-hz = /bits/ 64 <408000000>;
  13. opp-microvolt = <800000>;
  14. clock-latency-ns = <40000>;
  15. };
  16. opp01 {
  17. opp-hz = /bits/ 64 <600000000>;
  18. opp-microvolt = <825000>;
  19. };
  20. opp02 {
  21. opp-hz = /bits/ 64 <816000000>;
  22. opp-microvolt = <850000>;
  23. };
  24. opp03 {
  25. opp-hz = /bits/ 64 <1008000000>;
  26. opp-microvolt = <900000>;
  27. };
  28. opp04 {
  29. opp-hz = /bits/ 64 <1200000000>;
  30. opp-microvolt = <975000>;
  31. };
  32. opp05 {
  33. opp-hz = /bits/ 64 <1416000000>;
  34. opp-microvolt = <1100000>;
  35. };
  36. opp06 {
  37. opp-hz = /bits/ 64 <1512000000>;
  38. opp-microvolt = <1150000>;
  39. };
  40. opp07 {
  41. opp-hz = /bits/ 64 <1608000000>;
  42. opp-microvolt = <1200000>;
  43. };
  44. opp08 {
  45. opp-hz = /bits/ 64 <1704000000>;
  46. opp-microvolt = <1200000>;
  47. };
  48. };
  49.  
  50. cluster1_opp: opp-table-1 {
  51. compatible = "operating-points-v2";
  52. opp-shared;
  53.  
  54. opp00 {
  55. opp-hz = /bits/ 64 <408000000>;
  56. opp-microvolt = <800000>;
  57. clock-latency-ns = <40000>;
  58. };
  59. opp01 {
  60. opp-hz = /bits/ 64 <600000000>;
  61. opp-microvolt = <800000>;
  62. };
  63. opp02 {
  64. opp-hz = /bits/ 64 <816000000>;
  65. opp-microvolt = <825000>;
  66. };
  67. opp03 {
  68. opp-hz = /bits/ 64 <1008000000>;
  69. opp-microvolt = <850000>;
  70. };
  71. opp04 {
  72. opp-hz = /bits/ 64 <1200000000>;
  73. opp-microvolt = <900000>;
  74. };
  75. opp05 {
  76. opp-hz = /bits/ 64 <1416000000>;
  77. opp-microvolt = <975000>;
  78. };
  79. opp06 {
  80. opp-hz = /bits/ 64 <1512000000>;
  81. opp-microvolt = <1000000>;
  82. };
  83. opp07 {
  84. opp-hz = /bits/ 64 <1608000000>;
  85. opp-microvolt = <1050000>;
  86. };
  87. opp08 {
  88. opp-hz = /bits/ 64 <1800000000>;
  89. opp-microvolt = <1150000>;
  90. };
  91. opp09 {
  92. opp-hz = /bits/ 64 <2016000000>;
  93. opp-microvolt = <1250000>;
  94. };
  95. opp10 {
  96. opp-hz = /bits/ 64 <2088000000>;
  97. opp-microvolt = <1250000>;
  98. };
  99. };
  100.  
  101. gpu_opp_table: opp-table-2 {
  102. compatible = "operating-points-v2";
  103.  
  104. opp00 {
  105. opp-hz = /bits/ 64 <200000000>;
  106. opp-microvolt = <800000>;
  107. };
  108. opp01 {
  109. opp-hz = /bits/ 64 <297000000>;
  110. opp-microvolt = <800000>;
  111. };
  112. opp02 {
  113. opp-hz = /bits/ 64 <400000000>;
  114. opp-microvolt = <825000>;
  115. };
  116. opp03 {
  117. opp-hz = /bits/ 64 <500000000>;
  118. opp-microvolt = <850000>;
  119. };
  120. opp04 {
  121. opp-hz = /bits/ 64 <600000000>;
  122. opp-microvolt = <925000>;
  123. };
  124. opp05 {
  125. opp-hz = /bits/ 64 <800000000>;
  126. opp-microvolt = <1075000>;
  127. };
  128. opp06 {
  129. opp-hz = /bits/ 64 <900000000>;
  130. opp-microvolt = <1150000>;
  131. };
  132. opp07 {
  133. opp-hz = /bits/ 64 <950000000>;
  134. opp-microvolt = <1200000>;
  135. };
  136. };
  137. };
  138.  
  139. &cpu_l0 {
  140. operating-points-v2 = <&cluster0_opp>;
  141. };
  142.  
  143. &cpu_l1 {
  144. operating-points-v2 = <&cluster0_opp>;
  145. };
  146.  
  147. &cpu_l2 {
  148. operating-points-v2 = <&cluster0_opp>;
  149. };
  150.  
  151. &cpu_l3 {
  152. operating-points-v2 = <&cluster0_opp>;
  153. };
  154.  
  155. &cpu_b0 {
  156. operating-points-v2 = <&cluster1_opp>;
  157. };
  158.  
  159. &cpu_b1 {
  160. operating-points-v2 = <&cluster1_opp>;
  161. };
  162.  
  163. &gpu {
  164. operating-points-v2 = <&gpu_opp_table>;
  165. };
  166.  
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