code_lock_simple

------ code_lock_simple ------
library ieee;
use ieee.std_logic_1164.all;

entity code_lock_simple is
port(
    enter   : in std_logic;
    reset   : in std_logic;
    clk     : in std_logic;
    code    : in std_logic_vector(3 downto 0);
    lock    : out std_logic);
end code_lock_simple;

architecture state_machine of code_lock_simple is
    type    state is(idle, evaluating_code_1, getting_code_2, evaluating_code_2, unlocked, going_idle);
    signal  present_state, next_state : state;
    signal  code1, code2 : std_logic_vector(3 downto 0);
begin

    code1 <= "1111";                -- code1 og code2 defineres
    code2 <= "0000";

    state_reg: process(clk, reset)  -- state register defineres
    begin
        if reset = '0' then
            present_state <= idle;
        elsif rising_edge(clk) then
            present_state <= next_state;
        end if;
    end process;

    nxt_state: process(present_state, enter, code)
    begin
        next_state <= present_state;    -- next_state defineres ud fra ibd
        case present_state is
            when idle =>
                if enter = '0' then
                    next_state <= evaluating_code_1;
                end if;
            when evaluating_code_1 =>
                if (enter = '1' and code = code1) then
                    next_state <= getting_code_2;
                elsif (enter = '1' and code = NOT code1) then
                    next_state <= idle;
                end if;
            when getting_code_2 =>
                if enter = '0' then
                    next_state <= evaluating_code_2;
                end if;
            when evaluating_code_2 =>
                if (enter = '1' and code = code2) then
                    next_state <= unlocked;
                elsif (enter = '1' and code = NOT code2) then
                    next_state <= idle;
                end if;
            when unlocked =>
                if enter = '0' then
                    next_state <= going_idle;
                end if;
            when going_idle =>
                if enter = '1' then
                    next_state <= idle;
                end if;
        end case;
    end process;

    outputs: process(present_state) -- outputs defineres ud fra ibd
    begin
        case present_state is
            when unlocked =>
                lock <= '0';
            when others =>
                lock <= '1';
        end case;
    end process;

end state_machine;