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gol_dec_tb

Feb 23rd, 2024
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VHDL 1.76 KB | None | 0 0
  1. ----------------------------------------------------------------------------------
  2. -- Company:
  3. -- Engineer:
  4. --
  5. -- Create Date: 23.02.2024 22:08:25
  6. -- Design Name:
  7. -- Module Name: gol_dec_tb - rtl
  8. -- Project Name:
  9. -- Target Devices:
  10. -- Tool Versions:
  11. -- Description:
  12. --
  13. -- Dependencies:
  14. --
  15. -- Revision:
  16. -- Revision 0.01 - File Created
  17. -- Additional Comments:
  18. --
  19. ----------------------------------------------------------------------------------
  20.  
  21.  
  22. library IEEE;
  23. use IEEE.STD_LOGIC_1164.ALL;
  24.  
  25. entity gol_dec_tb is
  26. --  Port ( );
  27. end gol_dec_tb;
  28.  
  29. architecture rtl of gol_dec_tb is
  30.     -- Declare the component under test
  31.     component gol_dec is
  32.         port (
  33.             codeword_i : in  std_logic_vector(5 downto  0);
  34.             symbol_o   : out std_logic_vector(3 downto  0)
  35.         );
  36.     end component gol_dec;
  37.  
  38.     -- Declare signals for the testbench
  39.     signal tb_codeword_i : std_logic_vector(5 downto  0);
  40.     signal tb_symbol_o   : std_logic_vector(3 downto  0);
  41.  
  42. begin
  43.     -- Instantiate the component under test
  44.     dut: gol_dec
  45.         port map (
  46.             codeword_i => tb_codeword_i,
  47.             symbol_o   => tb_symbol_o
  48.         );
  49.  
  50.     -- Testbench stimulus process
  51.     stim_proc: process
  52.     begin
  53.         -- Initialize inputs
  54.         tb_codeword_i <= "100000";
  55.         wait for  10 ns;
  56.  
  57.         tb_codeword_i <= "001000";
  58.         wait for  10 ns;
  59.  
  60.         tb_codeword_i <= "000110";
  61.         wait for  10 ns;
  62.        
  63.         tb_codeword_i <= "001100";
  64.         wait for  10 ns;
  65.        
  66.         tb_codeword_i <= "111000";
  67.         wait for  10 ns;
  68.        
  69.         tb_codeword_i <= "010100";
  70.         wait for  10 ns;
  71.         -- End the simulation
  72.         wait;
  73.     end process stim_proc;    
  74. end rtl;
  75.  
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