Advertisement
Sidsh

Haskell Blinker

Jun 26th, 2022
355
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
  1. {-# OPTIONS_GHC -fno-warn-orphans #-}
  2. module Blinker where
  3.  
  4. import Clash.Prelude
  5. import Clash.Intel.ClockGen
  6. import Clash.Annotations.SynthesisAttributes
  7. createDomain vSystem{vName="Input", vPeriod=20000}
  8. createDomain vSystem{vName="Dom20MHz", vPeriod=50000}
  9.  
  10. {-# ANN topEntity
  11.   (Synthesize
  12.     { t_name   = "blinker"
  13.     , t_inputs = [ PortName "CLOCK_50"
  14.                  , PortName "KEY0"
  15.                  , PortName "KEY1"
  16.                  ]
  17.     , t_output = PortName "LED"
  18.     }) #-}
  19. topEntity ::
  20.   Clock Input
  21.     `Annotate` 'StringAttr "chip_pin" "R8"
  22.    `Annotate` 'StringAttr
  23.                 "altera_attribute" "-name IO_STANDARD \"3.3-V LVTTL\"" ->
  24.   Signal Input Bool
  25.     `Annotate` 'StringAttr "chip_pin" "J15"
  26.    `Annotate` 'StringAttr
  27.                 "altera_attribute" "-name IO_STANDARD \"3.3-V LVTTL\"" ->
  28.   Signal Dom20MHz Bit
  29.     `Annotate` 'StringAttr "chip_pin" "E1"
  30.    `Annotate` 'StringAttr
  31.                 "altera_attribute" "-name IO_STANDARD \"3.3-V LVTTL\"" ->
  32.   Signal Dom20MHz (BitVector 8)
  33.     `Annotate` 'StringAttr
  34.                "chip_pin" "L3, B1, F3, D1, A11, B13, A13, A15"
  35.    `Annotate` 'StringAttr
  36.                 "altera_attribute" "-name IO_STANDARD \"3.3-V LVTTL\""
  37. topEntity clk50Mhz rstBtn modeBtn =
  38.   exposeClockResetEnable
  39.     (mealy blinkerT initialStateBlinkerT . isRising 1)
  40.     clk20Mhz
  41.     rstSync
  42.     en
  43.     modeBtn
  44.   where
  45.   en = enableGen
  46.   initialStateBlinkerT = (1, Rotate, 0)
  47.   rst = unsafeFromLowPolarity rstBtn
  48.   (clk20Mhz, pllStable) =
  49.     altpll
  50.       @Dom20MHz
  51.       (SSymbol @"altpll20")
  52.       clk50Mhz
  53.       rst
  54.   rstSync =
  55.     resetSynchronizer
  56.       clk20Mhz
  57.       (unsafeFromLowPolarity pllStable)
  58. data LedMode
  59.   = Rotate
  60.   | Complement
  61.   deriving (Generic, NFDataX)
  62.  
  63. flipMode :: LedMode -> LedMode
  64. flipMode Rotate = Complement
  65. flipMode Complement = Rotate
  66.  
  67. -- Finally, the actual behavior of the circuit
  68. blinkerT ::
  69.   (BitVector 8, LedMode, Index 6660000) ->
  70.   Bool ->
  71.   ((BitVector 8, LedMode, Index 6660000), BitVector 8)
  72. blinkerT (leds, mode, cntr) key1R = ((ledsN, modeN, cntrN), leds)
  73.   where
  74.     -- clock frequency = 20e6  (20 MHz)
  75.     -- led update rate = 333e-3 (every 333ms)
  76.     cnt_max = maxBound :: Index 6660000 -- 20e6 * 333e-3
  77.  
  78.     cntrN | cntr == cnt_max = 0
  79.           | otherwise       = cntr + 1
  80.  
  81.     modeN | key1R     = flipMode mode
  82.           | otherwise = mode
  83.  
  84.     ledsN | cntr == 0 =
  85.               case mode of
  86.                 Rotate -> rotateL leds 1
  87.                 Complement -> complement leds
  88.           | otherwise = leds
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement