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- LIBRARY ieee;
- USE ieee.std_logic_1164.ALL;
- USE IEEE.STD_LOGIC_ARITH.ALL;
- USE IEEE.STD_LOGIC_UNSIGNED.ALL;
- ENTITY Calculadora IS
- port (
- -- Clocks
- CLOCK_24, -- 24 MHz
- CLOCK_27, -- 27 MHz
- CLOCK_50, -- 50 MHz
- EXT_CLOCK : in std_logic; -- External Clock
- -- Buttons and switches
- KEY : in std_logic_vector(3 downto 0); -- Push buttons
- SW : in std_logic_vector(9 downto 0); -- DPDT switches
- -- LED displays
- HEX0, HEX1, HEX2, HEX3 -- 7-segment displays
- : out std_logic_vector(6 downto 0);
- LEDG : out std_logic_vector(7 downto 0); -- Green LEDs
- LEDR : out std_logic_vector(9 downto 0); -- Red LEDs
- -- RS-232 interface
- UART_TXD : out std_logic; -- UART transmitter
- UART_RXD : in std_logic; -- UART receiver
- -- SDRAM
- DRAM_DQ : inout std_logic_vector(15 downto 0); -- Data Bus
- DRAM_ADDR : out std_logic_vector(11 downto 0); -- Address Bus
- DRAM_LDQM, -- Low-byte Data Mask
- DRAM_UDQM, -- High-byte Data Mask
- DRAM_WE_N, -- Write Enable
- DRAM_CAS_N, -- Column Address Strobe
- DRAM_RAS_N, -- Row Address Strobe
- DRAM_CS_N, -- Chip Select
- DRAM_BA_0, -- Bank Address 0
- DRAM_BA_1, -- Bank Address 0
- DRAM_CLK, -- Clock
- DRAM_CKE : out std_logic; -- Clock Enable
- -- FLASH
- FL_DQ : inout std_logic_vector(7 downto 0); -- Data bus
- FL_ADDR : out std_logic_vector(21 downto 0); -- Address bus
- FL_WE_N, -- Write Enable
- FL_RST_N, -- Reset
- FL_OE_N, -- Output Enable
- FL_CE_N : out std_logic; -- Chip Enable
- -- SRAM
- SRAM_DQ : inout std_logic_vector(15 downto 0); -- Data bus 16 Bits
- SRAM_ADDR : out std_logic_vector(17 downto 0); -- Address bus 18 Bits
- SRAM_UB_N, -- High-byte Data Mask
- SRAM_LB_N, -- Low-byte Data Mask
- SRAM_WE_N, -- Write Enable
- SRAM_CE_N, -- Chip Enable
- SRAM_OE_N : out std_logic; -- Output Enable
- -- SD card interface
- SD_DAT, -- SD Card Data
- SD_DAT3, -- SD Card Data 3
- SD_CMD : inout std_logic; -- SD Card Command Signal
- SD_CLK : out std_logic; -- SD Card Clock
- -- USB JTAG link
- TDI, -- CPLD -> FPGA (data in)
- TCK, -- CPLD -> FPGA (clk)
- TCS : in std_logic; -- CPLD -> FPGA (CS)
- TDO : out std_logic; -- FPGA -> CPLD (data out)
- -- I2C bus
- I2C_SDAT : inout std_logic; -- I2C Data
- I2C_SCLK : out std_logic; -- I2C Clock
- -- PS/2 port
- PS2_DAT, -- Data
- PS2_CLK : in std_logic; -- Clock
- -- VGA output
- VGA_HS, -- H_SYNC
- VGA_VS: out std_logic; -- V_SYNC
- VGA_R, -- Red[3:0]
- VGA_G, -- Green[3:0]
- VGA_B : out std_logic_vector(3 downto 0); -- Blue[3:0]
- -- Audio CODEC
- AUD_ADCLRCK : inout std_logic; -- ADC LR Clock
- AUD_ADCDAT : in std_logic; -- ADC Data
- AUD_DACLRCK : inout std_logic; -- DAC LR Clock
- AUD_DACDAT : out std_logic; -- DAC Data
- AUD_BCLK : inout std_logic; -- Bit-Stream Clock
- AUD_XCK : out std_logic; -- Chip Clock
- -- General-purpose I/O
- GPIO_0, -- GPIO Connection 0
- GPIO_1 : inout std_logic_vector(35 downto 0); -- GPIO Connection 1
- --teclado
- keyboard_clk, keyboard_data, clock_50MHz ,
- reset, read : IN STD_LOGIC;
- scan_code : OUT STD_LOGIC_VECTOR( 7 DOWNTO 0 );
- scan_ready : OUT STD_LOGIC
- );
- END Calculadora;
- ARCHITECTURE comportamental OF Calculadora IS
- --talvez vire uma maquina de estados, usada quando se aperta o igual
- TYPE operacao IS (ENTER, SOMA, SUBTRACAO, MULTIPLICACAO, DIVISAO);
- SIGNAL OPERACAOKB: operacao := ENTER;
- SIGNAL VALOR_ANTERIOR:INTEGER:=0;
- SIGNAL VALOR_ATUAL:INTEGER:=0;
- SIGNAL Resultado:INTEGER:=0;
- --seria a TeclaDigitada do teclado
- SIGNAL TeclaDigitada: STD_LOGIC_VECTOR (3 DOWNTO 0):=KEY;
- --esse valor de saida sera convertido num process para os displays
- SIGNAL saida: INTEGER:=0;
- --nao vou acender led nenhum pra memoria
- SIGNAL memoria:INTEGER:=0;
- --quando o valor for muito alto, esse signal fica positivo, indicando um buffer overflow
- SIGNAL erro: BIT:='0';
- --signal section (teclado)
- SIGNAL INCNT : STD_LOGIC_VECTOR( 3 DOWNTO 0 );
- SIGNAL SHIFTIN : STD_LOGIC_VECTOR( 8 DOWNTO 0 );
- SIGNAL CodigoTeclado : STD_LOGIC_VECTOR( 8 DOWNTO 0 );
- SIGNAL READ_CHAR, clock_enable : STD_LOGIC;
- SIGNAL INFLAG, ready_set : STD_LOGIC;
- SIGNAL keyboard_clk_filtered : STD_LOGIC;
- SIGNAL filter : STD_LOGIC_VECTOR( 7 DOWNTO 0 );
- BEGIN
- PROCESS(CLOCK_50, TeclaDigitada, CodigoTeclado) BEGIN
- --uma variavel auxiliar para fazer as contas
- --a saida recebe ela
- IF CLOCK_50'EVENT AND CLOCK_50='1' THEN
- --detectar tecla digitada (numero, numero da tecla, scan_code)
- -- 0 - 99 - 70
- -- 1 - 93 - 69
- -- 2 - 98 - 72
- -- 3 - 103 - 7A
- -- 4 - 76 - E0 70
- -- 5 - 97 - 73
- -- 6 - 102 - 74
- -- 7 - 91 - 6C
- -- 8 - 96 - 75
- -- 9 - 101 - 7D
- -- + - 106 - 79
- -- - - 105 - 7B
- -- * - 100 - 7C
- -- / - 95 - E0 4A
- -- E - 108 - 5A
- -- Processa tecla digitada
- CASE TeclaDigitada IS
- WHEN "0000" => VALOR_ATUAL <= VALOR_ATUAL*10;
- WHEN "0001" => VALOR_ATUAL <= VALOR_ATUAL*10 + 1;
- WHEN "0010" => VALOR_ATUAL <= VALOR_ATUAL*10 + 2;
- WHEN "0011" => VALOR_ATUAL <= VALOR_ATUAL*10 + 3;
- WHEN "0100" => VALOR_ATUAL <= VALOR_ATUAL*10 + 4;
- WHEN "0101" => VALOR_ATUAL <= VALOR_ATUAL*10 + 5;
- WHEN "0110" => VALOR_ATUAL <= VALOR_ATUAL*10 + 6;
- WHEN "0111" => VALOR_ATUAL <= VALOR_ATUAL*10 + 7;
- WHEN "1000" => VALOR_ATUAL <= VALOR_ATUAL*10 + 8;
- WHEN "1001" => VALOR_ATUAL <= VALOR_ATUAL*10 + 9;
- WHEN "1010" => OPERACAOKB<=SOMA;
- VALOR_ANTERIOR<=VALOR_ATUAL;
- VALOR_ATUAL<=0;
- WHEN "1011" => OPERACAOKB<=SUBTRACAO;
- VALOR_ANTERIOR<=VALOR_ATUAL;
- VALOR_ATUAL<=0;
- WHEN "1100" => OPERACAOKB<=MULTIPLICACAO;
- VALOR_ANTERIOR<=VALOR_ATUAL;
- VALOR_ATUAL<=0;
- WHEN "1101" => OPERACAOKB<=DIVISAO;
- VALOR_ANTERIOR<=VALOR_ATUAL;
- VALOR_ATUAL<=0;
- WHEN "1111" => -- Tecla =, faz operações
- CASE OPERACAOKB IS
- WHEN SOMA =>
- RESULTADO <= VALOR_ATUAL+VALOR_ANTERIOR;
- VALOR_ATUAL <= 0;
- VALOR_ANTERIOR <= 0;
- WHEN SUBTRACAO =>
- RESULTADO <= VALOR_ATUAL - VALOR_ANTERIOR;
- VALOR_ATUAL <= 0;
- VALOR_ANTERIOR <= 0;
- WHEN MULTIPLICACAO =>
- RESULTADO <= VALOR_ATUAL * VALOR_ANTERIOR;
- VALOR_ATUAL <= 0;
- VALOR_ANTERIOR <= 0;
- WHEN DIVISAO =>
- RESULTADO <= VALOR_ATUAL / VALOR_ANTERIOR;
- VALOR_ATUAL <= 0;
- VALOR_ANTERIOR <= 0;
- WHEN OTHERS => RESULTADO <= RESULTADO;
- END CASE;
- WHEN OTHERS => VALOR_ATUAL <= VALOR_ATUAL;
- END CASE;
- IF RESULTADO<=9999 THEN
- saida<=RESULTADO;
- ELSE
- saida<=0;
- END IF;
- END IF;
- END PROCESS;
- PROCESS (saida)
- VARIABLE valor:INTEGER;
- VARIABLE um: INTEGER;
- VARIABLE c: INTEGER;
- VARIABLE d: INTEGER;
- VARIABLE u: INTEGER;
- BEGIN
- --separa o numero em casas decimais
- valor := saida;
- um:= valor / 1000;
- valor := valor - um*1000;
- c := valor / 100;
- valor := valor - c*100;
- d := valor /10;
- valor := valor - d*10;
- u := valor;
- --acende os displays de acordo com os numeros
- -- unidades de milhar - display 0
- IF (um=1) THEN
- HEX0<="1001111";
- ELSIF (um=2) THEN
- HEX0<="0010010";
- ELSIF (um=3) THEN
- HEX0<="0000110";
- ELSIF (um=4) THEN
- HEX0<="1001100";
- ELSIF (um=5) THEN
- HEX0<="0100100";
- ELSIF (um=6) THEN
- HEX0<="0100000";
- ELSIF (um=7) THEN
- HEX0<="0001111";
- ELSIF (um=8) THEN
- HEX0<="0000000";
- ELSIF (um=9) THEN
- HEX0<="0000100";
- ELSIF (um=0) THEN
- HEX0<="0000001";
- END IF;
- --centenas - display 1
- IF (c=1) THEN
- HEX1<="1001111";
- ELSIF (c=2) THEN
- HEX1<="0010010";
- ELSIF (c=3) THEN
- HEX1<="0000110";
- ELSIF (c=4) THEN
- HEX1<="1001100";
- ELSIF (c=5) THEN
- HEX1<="0100100";
- ELSIF (c=6) THEN
- HEX1<="0100000";
- ELSIF (c=7) THEN
- HEX1<="0001111";
- ELSIF (c=8) THEN
- HEX1<="0000000";
- ELSIF (c=9) THEN
- HEX1<="0000100";
- ELSIF (c=0) THEN
- HEX1<="0000001";
- END IF;
- --dezena - display 2
- IF (d=1) THEN
- HEX2<="1001111";
- ELSIF (d=2) THEN
- HEX2<="0010010";
- ELSIF (d=3) THEN
- HEX2<="0000110";
- ELSIF (d=4) THEN
- HEX2<="1001100";
- ELSIF (d=5) THEN
- HEX2<="0100100";
- ELSIF (d=6) THEN
- HEX2<="0100000";
- ELSIF (d=7) THEN
- HEX2<="0001111";
- ELSIF (d=8) THEN
- HEX2<="0000000";
- ELSIF (d=9) THEN
- HEX2<="0000100";
- ELSIF (d=0) THEN
- HEX2<="0000001";
- END IF;
- --unidade - display 3
- IF (u=1) THEN
- HEX3<="1001111";
- ELSIF (u=2) THEN
- HEX3<="0010010";
- ELSIF (u=3) THEN
- HEX3<="0000110";
- ELSIF (u=4) THEN
- HEX3<="1001100";
- ELSIF (u=5) THEN
- HEX3<="0100100";
- ELSIF (u=6) THEN
- HEX3<="0100000";
- ELSIF (u=7) THEN
- HEX3<="0001111";
- ELSIF (u=8) THEN
- HEX3<="0000000";
- ELSIF (u=9) THEN
- HEX3<="0000100";
- ELSIF (u=0) THEN
- HEX3<="0000001";
- END IF;
- END PROCESS;
- PROCESS ( read, ready_set )
- BEGIN
- IF read = '1' THEN
- scan_ready <= '0';
- ELSIF ready_set'EVENT AND ready_set = '1' THEN
- scan_ready <= '1';
- END IF;
- END PROCESS;
- --This process filters the raw clock signal coming from the
- -- keyboard using a shift register and two AND gates
- Clock_filter:
- PROCESS
- BEGIN
- WAIT UNTIL clock_50MHz'EVENT AND clock_50MHz = '1';
- clock_enable <= NOT clock_enable;
- IF clock_enable = '1' THEN
- filter ( 6 DOWNTO 0 ) <= filter( 7 DOWNTO 1 ) ;
- filter( 7 ) <= keyboard_clk;
- IF filter = "11111111" THEN
- keyboard_clk_filtered <= '1';
- ELSIF filter = "00000000" THEN
- keyboard_clk_filtered <= '0';
- END IF;
- END IF;
- END PROCESS Clock_filter;
- --This process reads in serial scan code data coming from the keyboard
- PROCESS
- BEGIN
- WAIT UNTIL (KEYBOARD_CLK_filtered'EVENT AND KEYBOARD_CLK_filtered = '1');
- IF RESET = '0' THEN
- INCNT <= "0000";
- READ_CHAR <= '0';
- ELSE
- IF KEYBOARD_DATA = '0' AND READ_CHAR = '0' THEN
- READ_CHAR <= '1';
- ready_set <= '0';
- ELSE
- -- Shift in next 8 data bits to assemble a scan code
- IF READ_CHAR = '1' THEN
- IF INCNT < "1001" THEN
- INCNT <= INCNT + 1;
- SHIFTIN( 7 DOWNTO 0 ) <= SHIFTIN( 8 DOWNTO 1 );
- SHIFTIN( 8 ) <= KEYBOARD_DATA;
- ready_set <= '0';
- -- End of scan code character, so set flags and exit loop
- ELSE
- scan_code <= SHIFTIN( 7 DOWNTO 0 );
- CodigoTeclado <= SHIFTIN;
- READ_CHAR <='0';
- ready_set <= '1';
- INCNT <= "0000";
- END IF;
- END IF;
- END IF;
- END IF;
- END PROCESS;
- END comportamental;
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