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  1. #ifndef __HW_COMMON_H
  2. #define __HW_COMMON_H
  3.  
  4. #include <stdint.h>
  5.  
  6. /* To overwrite CSR accessors, define extern, non-inlined versions
  7.  * of csr_read[bwl]() and csr_write[bwl](), and define
  8.  * CSR_ACCESSORS_DEFINED.
  9.  */
  10.  
  11. #ifndef CSR_ACCESSORS_DEFINED
  12. #define CSR_ACCESSORS_DEFINED
  13.  
  14. #ifdef __ASSEMBLER__
  15. #define MMPTR(x) x
  16. #else /* ! __ASSEMBLER__ */
  17.  
  18. /* CSRs are stored in subregister slices of CONFIG_CSR_DATA_WIDTH (native
  19.  * endianness), with the least significant slice at the lowest aligned
  20.  * (base) address. */
  21.  
  22. #include <generated/soc.h>
  23. #if !defined(CONFIG_CSR_ALIGNMENT) || !defined(CONFIG_CSR_DATA_WIDTH)
  24. #error csr alignment and data-width MUST be set before including this file!
  25. #endif
  26.  
  27. #if CONFIG_CSR_DATA_WIDTH > CONFIG_CSR_ALIGNMENT
  28. #error invalid CONFIG_CSR_DATA_WIDTH (must not exceed CONFIG_CSR_ALIGNMENT)!
  29. #endif
  30.  
  31. #define CSR_ADDR_INC sizeof(unsigned long) // a.k.a. CONFIG_CSR_ALIGNMENT/8
  32. /* FIXME: preprocessor can't evaluate 'sizeof()' operator !!!
  33.   #if CSR_ADDR_INC != CONFIG_CSR_ALIGNMENT/8
  34.   #error invalid CONFIG_CSR_ALIGNMENT (must match native CPU word size)!
  35.   #endif
  36. */
  37.  
  38. /* CSR subregisters are embedded inside native CPU word aligned locations: */
  39. #define MMPTR(a) (*((volatile unsigned long *)(a)))
  40.  
  41. /* Number of subregs required for various int types, given subreg. width:
  42.  *  +-----+------------+
  43.  *  | csr | sizeof(v)  |
  44.  *  | _dw | 1  2  4  8 |
  45.  *  |     |------------|
  46.  *  |  1  | 1  2  4  8 |
  47.  *  |  2  | 1  1  2  4 |
  48.  *  |  4  | 1  1  1  2 |
  49.  *  |  8  | 1  1  1  1 |
  50.  *  +-----+------------+ */
  51. #define _CSR_N_SUBS(v) ((sizeof(v) - 1) / (CONFIG_CSR_DATA_WIDTH / 8) + 1)
  52.  
  53. #define _CSR_REG_WR(v, a) \
  54. { \
  55.     int n_subs = _CSR_N_SUBS(v); \
  56.     for (int i = 0; i < n_subs; i++) \
  57.         MMPTR((a) + CSR_ADDR_INC * i) = \
  58.             v >> (CONFIG_CSR_DATA_WIDTH * (n_subs - 1 - i)); \
  59. }
  60.  
  61. #define _CSR_REG_RD(r, a) \
  62. { \
  63.     int n_subs = _CSR_N_SUBS(r); \
  64.     r = 0; \
  65.     for (int i = 0; i < n_subs; i++) \
  66.         r |= MMPTR((a) + CSR_ADDR_INC * i) << \
  67.             (CONFIG_CSR_DATA_WIDTH * (n_subs - 1 - i)); \
  68. }
  69.  
  70. static inline void csr_wr_uint8(uint8_t v, unsigned long a)
  71. {
  72.     _CSR_REG_WR(v, a);
  73. }
  74.  
  75. static inline void csr_wr_uint16(uint16_t v, unsigned long a)
  76. {
  77.     _CSR_REG_WR(v, a);
  78. }
  79.  
  80. static inline void csr_wr_uint32(uint32_t v, unsigned long a)
  81. {
  82.     _CSR_REG_WR(v, a);
  83. }
  84.  
  85. static inline void csr_wr_uint64(uint64_t v, unsigned long a)
  86. {
  87.     _CSR_REG_WR(v, a);
  88. }
  89.  
  90. static inline uint8_t csr_rd_uint8(unsigned long a)
  91. {
  92.     uint8_t r;
  93.     _CSR_REG_RD(r, a);
  94.     return r;
  95. }
  96.  
  97. static inline uint16_t csr_rd_uint16(unsigned long a)
  98. {
  99.     uint16_t r;
  100.     _CSR_REG_RD(r, a);
  101.     return r;
  102. }
  103.  
  104. static inline uint32_t csr_rd_uint32(unsigned long a)
  105. {
  106.     uint32_t r;
  107.     _CSR_REG_RD(r, a);
  108.     return r;
  109. }
  110.  
  111. static inline uint64_t csr_rd_uint64(unsigned long a)
  112. {
  113.     uint64_t r;
  114.     _CSR_REG_RD(r, a);
  115.     return r;
  116. }
  117.  
  118. #endif /* ! __ASSEMBLER__ */
  119.  
  120. #endif /* ! CSR_ACCESSORS_DEFINED */
  121.  
  122. #endif /* __HW_COMMON_H */
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