SPI DMA

void DMAInit(void)
{
    DMA_InitTypeDef  DMA_InitStructure;
    // Enable DMA1 Peripheral Clock (SPI_DECAWAVE and SPI_BUS)
    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);

    // Configure SPI_BUS RX Channel
    DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC; // From SPI to memory
    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SPIx_DR_ADDRESS; //(uint32_t)&SPI2->DR;
    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
    DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
    DMA_InitStructure.DMA_MemoryBaseAddr = 0; // To be set later
    DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
    DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
    DMA_InitStructure.DMA_BufferSize = 1; // To be set later
    DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
    DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
    DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
    DMA_Init(SPIx_RX_DMA_CHANNEL, &DMA_InitStructure);

    // Configure SPI_BUS TX Channel
    DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST; // From memory to SPI
    DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)SPIx_DR_ADDRESS; //(uint32_t)&SPI2->DR
    DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
    DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
    DMA_InitStructure.DMA_MemoryBaseAddr = 0; // To be set later
    DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
    DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
    DMA_InitStructure.DMA_BufferSize = 1; // To be set later
    DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
    DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
    DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
    DMA_Init(SPIx_TX_DMA_CHANNEL, &DMA_InitStructure);
}

__IO uint32_t TimeOut = 0x0;

void spiFlashRead(uint16_t DataLength, uint8_t *DataBuffer, uint32_t ReadAddr)
{
    uint8_t CommandLength=4, CommandBuffer[4];

    /* Send "Read from Memory " instruction */
    CommandBuffer[0] = READ; //SPI_FLASH_SendByte(READ);
    /* Send ReadAddr high nibble address byte to read from */
    CommandBuffer[1] = (ReadAddr & 0xFF0000) >> 16; //SPI_FLASH_SendByte((ReadAddr & 0xFF0000) >> 16);
    /* Send ReadAddr medium nibble address byte to read from */
    CommandBuffer[2] =  (ReadAddr& 0xFF00) >> 8; //SPI_FLASH_SendByte((ReadAddr& 0xFF00) >> 8);
    /* Send ReadAddr low nibble address byte to read from */
    CommandBuffer[3] =  ReadAddr & 0xFF; //SPI_FLASH_SendByte(ReadAddr & 0xFF);

    // Prepare the DMA
    SPIx_TX_DMA_CHANNEL->CNDTR = CommandLength; //DMA1_Channel5->CNDTR = CommandLength;
    SPIx_TX_DMA_CHANNEL->CMAR = (uint32_t)CommandBuffer;  //DMA1_Channel5->CMAR = (uint32_t)CommandBuffer;
    SPIx_RX_DMA_CHANNEL->CNDTR = DataLength; //DMA1_Channel4->CNDTR = DataLength;
    SPIx_RX_DMA_CHANNEL->CMAR = (uint32_t)DataBuffer;  //DMA1_Channel4->CMAR = (uint32_t)DataBuffer;

    // Enable the DMAs - They will await signals from the SPI hardware
    DMA_Cmd(SPIx_TX_DMA_CHANNEL, ENABLE);  //DMA_Cmd(DMA1_Channel5, ENABLE); // TX
    DMA_Cmd(SPIx_RX_DMA_CHANNEL, ENABLE);  //DMA_Cmd(DMA1_Channel4, ENABLE); // RX

    // Activate the Flash CS
    //GPIO_ResetBits(SPI_MEM_CS_GPIO, SPI_MEM_CS);
    /* Select the FLASH: Chip Select low */
    SPI_FLASH_CS_LOW();

    // Enable the SPI communication to the TX DMA, which will send the command
    SPI_I2S_DMACmd(SPIx, SPI_I2S_DMAReq_Tx, ENABLE);

    // Wait until the command is sent to the DR
    //while (!DMA_GetFlagStatus(DMA1_FLAG_TC5));
    while ((DMA_GetFlagStatus(SPIx_TX_DMA_FLAG_TC) == RESET)&&(TimeOut != 0x00))
    {}

    // Wait until the transmission is completed
    while (SPI_I2S_GetFlagStatus(SPIx, SPI_I2S_FLAG_TXE) == RESET);
    while (SPI_I2S_GetFlagStatus(SPIx, SPI_I2S_FLAG_BSY));

    // Disable the TX DMA and clear DMA flags
    SPI_I2S_DMACmd(SPIx, SPI_I2S_DMAReq_Tx, DISABLE);
    DMA_Cmd(SPIx_TX_DMA_CHANNEL, DISABLE);
    /* Clear DMA1 global flags*/
    DMA_ClearFlag(SPIx_RX_DMA_FLAG_GL);
    //NOTE: I checked the SPI OVR flag here, and it wasn't set...

    // Enable SPI communication to the RX DMA, which should receive the data
    SPI_I2S_DMACmd(SPIx, SPI_I2S_DMAReq_Rx, ENABLE);

    // Wait until the data is received
    //while (!DMA_GetFlagStatus(DMA1_FLAG_TC4));
    while ((DMA_GetFlagStatus(SPIx_RX_DMA_FLAG_TC) == RESET)&&(TimeOut != 0x00))
    {}

    // Disable the DMAs
    DMA_Cmd(SPIx_TX_DMA_CHANNEL, DISABLE); //DMA_Cmd(DMA1_Channel4, DISABLE); // RX
    DMA_Cmd(SPIx_RX_DMA_CHANNEL, DISABLE);  //DMA_Cmd(DMA1_Channel5, DISABLE); // TX

    /* Deselect the FLASH: Chip Select high */
    SPI_FLASH_CS_HIGH();
    // Release the Flash CS
    //GPIO_SetBits(SPI_MEM_CS_GPIO, SPI_MEM_CS);
    SPI_I2S_DMACmd(SPIx, SPI_I2S_DMAReq_Rx, DISABLE);
    DMA_Cmd(SPIx_RX_DMA_CHANNEL, DISABLE);
    DMA_ClearFlag(SPIx_RX_DMA_FLAG_GL);

} // end spiFlashRead()