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Sep 22nd, 2016
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  1. alex@ALeX-VirtualBox:~/PI/tutos/testInt$ /opt/gnuarmeclipse/openocd/0.10.0-201601101000-dev/bin/openocd -f ~/scripts/RPi_HUB_Module.cfg -f ~/scripts/raspi2.cfg -d3
  2. GNU ARM Eclipse 64-bits Open On-Chip Debugger 0.10.0-dev-00287-g85cec24-dirty (2016-01-10-10:31)
  3. Licensed under GNU GPL v2
  4. For bug reports, read
  5. http://openocd.org/doc/doxygen/bugs.html
  6. User : 13 1 command.c:546 command_print(): debug_level: 3
  7. Debug: 14 1 options.c:130 add_default_dirs(): bindir=bin
  8. Debug: 15 1 options.c:131 add_default_dirs(): pkgdatadir=
  9. Debug: 16 1 options.c:132 add_default_dirs(): run_prefix=/opt/gnuarmeclipse/openocd/0.10.0-201601101000-dev/
  10. Debug: 17 1 configuration.c:44 add_script_search_dir(): adding /home/alex/.openocd
  11. Debug: 18 1 configuration.c:44 add_script_search_dir(): adding /opt/gnuarmeclipse/openocd/0.10.0-201601101000-dev//site
  12. Debug: 19 1 configuration.c:44 add_script_search_dir(): adding /opt/gnuarmeclipse/openocd/0.10.0-201601101000-dev//scripts
  13. Debug: 20 1 configuration.c:84 find_file(): found /home/alex/scripts/RPi_HUB_Module.cfg
  14. Debug: 21 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_interface ftdi
  15. Debug: 22 1 command.c:145 script_debug(): command - interface ocd_interface ftdi
  16. Debug: 24 1 command.c:366 register_command_handler(): registering 'ocd_ftdi_device_desc'...
  17. Debug: 25 1 command.c:366 register_command_handler(): registering 'ocd_ftdi_serial'...
  18. Debug: 26 1 command.c:366 register_command_handler(): registering 'ocd_ftdi_channel'...
  19. Debug: 27 1 command.c:366 register_command_handler(): registering 'ocd_ftdi_layout_init'...
  20. Debug: 28 1 command.c:366 register_command_handler(): registering 'ocd_ftdi_layout_signal'...
  21. Debug: 29 1 command.c:366 register_command_handler(): registering 'ocd_ftdi_set_signal'...
  22. Debug: 30 1 command.c:366 register_command_handler(): registering 'ocd_ftdi_vid_pid'...
  23. Debug: 31 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_ftdi_device_desc FT2232H RPi HUB Module
  24. Debug: 32 1 command.c:145 script_debug(): command - ftdi_device_desc ocd_ftdi_device_desc FT2232H RPi HUB Module
  25. Debug: 34 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_ftdi_channel 0
  26. Debug: 35 1 command.c:145 script_debug(): command - ftdi_channel ocd_ftdi_channel 0
  27. Debug: 37 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_ftdi_vid_pid 0x0403 0x6010
  28. Debug: 38 1 command.c:145 script_debug(): command - ftdi_vid_pid ocd_ftdi_vid_pid 0x0403 0x6010
  29. Debug: 40 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_ftdi_layout_init 0x0018 0x00FB
  30. Debug: 41 1 command.c:145 script_debug(): command - ftdi_layout_init ocd_ftdi_layout_init 0x0018 0x00FB
  31. Debug: 43 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_ftdi_layout_signal nTRST -data 0x0020
  32. Debug: 44 1 command.c:145 script_debug(): command - ftdi_layout_signal ocd_ftdi_layout_signal nTRST -data 0x0020
  33. Debug: 46 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select jtag
  34. Debug: 47 1 command.c:145 script_debug(): command - ocd_transport ocd_transport select jtag
  35. Debug: 48 1 command.c:366 register_command_handler(): registering 'ocd_jtag_flush_queue_sleep'...
  36. Debug: 49 1 command.c:366 register_command_handler(): registering 'ocd_jtag_rclk'...
  37. Debug: 50 1 command.c:366 register_command_handler(): registering 'ocd_jtag_ntrst_delay'...
  38. Debug: 51 1 command.c:366 register_command_handler(): registering 'ocd_jtag_ntrst_assert_width'...
  39. Debug: 52 1 command.c:366 register_command_handler(): registering 'ocd_scan_chain'...
  40. Debug: 53 1 command.c:366 register_command_handler(): registering 'ocd_jtag_reset'...
  41. Debug: 54 1 command.c:366 register_command_handler(): registering 'ocd_runtest'...
  42. Debug: 55 1 command.c:366 register_command_handler(): registering 'ocd_irscan'...
  43. Debug: 56 1 command.c:366 register_command_handler(): registering 'ocd_verify_ircapture'...
  44. Debug: 57 1 command.c:366 register_command_handler(): registering 'ocd_verify_jtag'...
  45. Debug: 58 1 command.c:366 register_command_handler(): registering 'ocd_tms_sequence'...
  46. Debug: 59 1 command.c:366 register_command_handler(): registering 'ocd_wait_srst_deassert'...
  47. Debug: 60 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  48. Debug: 61 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  49. Debug: 62 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  50. Debug: 63 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  51. Debug: 64 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  52. Debug: 65 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  53. Debug: 66 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  54. Debug: 67 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  55. Debug: 68 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  56. Debug: 69 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  57. Debug: 70 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  58. Debug: 71 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  59. Debug: 72 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  60. Debug: 73 1 command.c:366 register_command_handler(): registering 'ocd_svf'...
  61. Debug: 74 1 command.c:366 register_command_handler(): registering 'ocd_xsvf'...
  62. User : 75 1 command.c:677 command_run_line(): jtagUser : 76 1 command.c:679 command_run_line():
  63. Debug: 77 1 configuration.c:84 find_file(): found /home/alex/scripts/raspi2.cfg
  64. Debug: 78 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_telnet_port 4444
  65. Debug: 79 1 command.c:145 script_debug(): command - telnet_port ocd_telnet_port 4444
  66. Debug: 81 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_gdb_port 3333
  67. Debug: 82 2 command.c:145 script_debug(): command - gdb_port ocd_gdb_port 3333
  68. Debug: 84 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 1000
  69. Debug: 85 2 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 1000
  70. Debug: 87 2 core.c:1629 jtag_config_khz(): handle jtag khz
  71. Debug: 88 2 core.c:1596 adapter_khz_to_speed(): convert khz to interface specific speed value
  72. Debug: 89 2 core.c:1596 adapter_khz_to_speed(): convert khz to interface specific speed value
  73. User : 90 2 command.c:546 command_print(): adapter speed: 1000 kHz
  74. Debug: 91 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag newtap bcmrpi2 dap -expected-id 0x4ba00477 -irlen 4 -ircapture 0x01 -irmask 0x0f
  75. Debug: 92 2 command.c:145 script_debug(): command - ocd_jtag ocd_jtag newtap bcmrpi2 dap -expected-id 0x4ba00477 -irlen 4 -ircapture 0x01 -irmask 0x0f
  76. Debug: 93 2 tcl.c:549 jim_newtap_cmd(): Creating New Tap, Chip: bcmrpi2, Tap: dap, Dotted: bcmrpi2.dap, 8 params
  77. Debug: 94 2 tcl.c:573 jim_newtap_cmd(): Processing option: -expected-id
  78. Debug: 95 2 tcl.c:573 jim_newtap_cmd(): Processing option: -irlen
  79. Debug: 96 2 tcl.c:573 jim_newtap_cmd(): Processing option: -ircapture
  80. Debug: 97 2 tcl.c:573 jim_newtap_cmd(): Processing option: -irmask
  81. Debug: 98 2 core.c:1302 jtag_tap_init(): Created Tap: bcmrpi2.dap @ abs position 0, irlen 4, capture: 0x1 mask: 0xf
  82. Debug: 99 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create bcmrpi2.cpu0 cortex_a -chain-position bcmrpi2.dap -coreid 0 -dbgbase 0x80010000
  83. Debug: 100 2 command.c:145 script_debug(): command - ocd_target ocd_target create bcmrpi2.cpu0 cortex_a -chain-position bcmrpi2.dap -coreid 0 -dbgbase 0x80010000
  84. Debug: 101 2 target.c:1881 target_free_all_working_areas_restore(): freeing all working areas
  85. Debug: 102 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  86. Debug: 103 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  87. Debug: 104 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  88. Debug: 105 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  89. Debug: 106 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  90. Debug: 107 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  91. Debug: 108 2 command.c:366 register_command_handler(): registering 'ocd_dap'...
  92. Debug: 109 2 command.c:366 register_command_handler(): registering 'ocd_dap'...
  93. Debug: 110 2 command.c:366 register_command_handler(): registering 'ocd_dap'...
  94. Debug: 111 2 command.c:366 register_command_handler(): registering 'ocd_dap'...
  95. Debug: 112 2 command.c:366 register_command_handler(): registering 'ocd_dap'...
  96. Debug: 113 2 command.c:366 register_command_handler(): registering 'ocd_dap'...
  97. Debug: 114 2 command.c:366 register_command_handler(): registering 'ocd_dap'...
  98. Debug: 115 2 command.c:366 register_command_handler(): registering 'ocd_cache_config'...
  99. Debug: 116 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  100. Debug: 117 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  101. Debug: 118 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  102. Debug: 119 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  103. Debug: 120 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  104. Debug: 121 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  105. Debug: 122 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  106. Debug: 123 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  107. Debug: 124 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  108. Debug: 125 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  109. Debug: 126 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  110. Debug: 127 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  111. Debug: 128 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  112. Debug: 129 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  113. Debug: 130 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  114. Debug: 131 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  115. Debug: 132 2 command.c:366 register_command_handler(): registering 'ocd_cache'...
  116. Debug: 133 2 command.c:366 register_command_handler(): registering 'ocd_cortex_a'...
  117. Debug: 134 2 command.c:366 register_command_handler(): registering 'ocd_cortex_a'...
  118. Debug: 135 2 command.c:366 register_command_handler(): registering 'ocd_cortex_a'...
  119. Debug: 136 2 command.c:366 register_command_handler(): registering 'ocd_cortex_a'...
  120. Debug: 137 2 command.c:366 register_command_handler(): registering 'ocd_cortex_a'...
  121. Debug: 138 2 command.c:366 register_command_handler(): registering 'ocd_cortex_a'...
  122. Debug: 139 2 command.c:366 register_command_handler(): registering 'ocd_cortex_a'...
  123. Debug: 140 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  124. Debug: 141 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  125. Debug: 142 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  126. Debug: 143 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  127. Debug: 144 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  128. Debug: 145 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  129. Debug: 146 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  130. Debug: 147 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  131. Debug: 148 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  132. Debug: 149 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  133. Debug: 150 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  134. Debug: 151 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  135. Debug: 152 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  136. Debug: 153 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  137. Debug: 154 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  138. Debug: 155 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  139. Debug: 156 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  140. Debug: 157 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  141. Debug: 158 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  142. Debug: 159 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  143. Debug: 160 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  144. Debug: 161 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  145. Debug: 162 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  146. Debug: 163 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  147. Debug: 164 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  148. Debug: 165 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  149. Debug: 166 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  150. Debug: 167 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  151. Debug: 168 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  152. Debug: 169 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  153. Debug: 170 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  154. Debug: 171 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  155. Debug: 172 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  156. Debug: 173 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  157. Debug: 174 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  158. Debug: 175 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  159. Debug: 176 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  160. Debug: 177 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  161. Debug: 178 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  162. Debug: 179 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  163. Debug: 180 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  164. Debug: 181 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  165. Debug: 182 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  166. Debug: 183 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  167. Debug: 184 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  168. Debug: 185 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  169. Debug: 186 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  170. Debug: 187 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  171. Debug: 188 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  172. Debug: 189 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  173. Debug: 190 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  174. Debug: 191 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  175. Debug: 192 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  176. Debug: 193 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  177. Debug: 194 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  178. Debug: 195 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  179. Debug: 196 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  180. Debug: 197 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  181. Debug: 198 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  182. Debug: 199 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  183. Debug: 200 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  184. Debug: 201 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu0'...
  185. Debug: 202 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create bcmrpi2.cpu1 cortex_a -chain-position bcmrpi2.dap -coreid 1 -dbgbase 0x80012000
  186. Debug: 203 2 command.c:145 script_debug(): command - ocd_target ocd_target create bcmrpi2.cpu1 cortex_a -chain-position bcmrpi2.dap -coreid 1 -dbgbase 0x80012000
  187. Debug: 204 2 target.c:1881 target_free_all_working_areas_restore(): freeing all working areas
  188. Debug: 205 2 command.c:401 register_command(): command 'arm' is already registered in '<global>' context
  189. Debug: 206 2 command.c:401 register_command(): command 'reg' is already registered in 'arm' context
  190. Debug: 207 2 command.c:401 register_command(): command 'core_state' is already registered in 'arm' context
  191. Debug: 208 2 command.c:401 register_command(): command 'disassemble' is already registered in 'arm' context
  192. Debug: 209 2 command.c:401 register_command(): command 'mcr' is already registered in 'arm' context
  193. Debug: 210 2 command.c:401 register_command(): command 'mrc' is already registered in 'arm' context
  194. Debug: 211 2 command.c:401 register_command(): command 'semihosting' is already registered in 'arm' context
  195. Debug: 212 2 command.c:401 register_command(): command 'dap' is already registered in '<global>' context
  196. Debug: 213 2 command.c:401 register_command(): command 'info' is already registered in 'dap' context
  197. Debug: 214 2 command.c:401 register_command(): command 'apsel' is already registered in 'dap' context
  198. Debug: 215 2 command.c:401 register_command(): command 'apcsw' is already registered in 'dap' context
  199. Debug: 216 2 command.c:401 register_command(): command 'apid' is already registered in 'dap' context
  200. Debug: 217 2 command.c:401 register_command(): command 'baseaddr' is already registered in 'dap' context
  201. Debug: 218 2 command.c:401 register_command(): command 'memaccess' is already registered in 'dap' context
  202. Debug: 219 2 command.c:401 register_command(): command 'ti_be_32_quirks' is already registered in 'dap' context
  203. Debug: 220 2 command.c:401 register_command(): command 'cache_config' is already registered in '<global>' context
  204. Debug: 221 2 command.c:401 register_command(): command 'l2x' is already registered in 'cache_config' context
  205. Debug: 222 2 command.c:401 register_command(): command 'cache' is already registered in '<global>' context
  206. Debug: 223 2 command.c:401 register_command(): command 'auto' is already registered in 'cache' context
  207. Debug: 224 2 command.c:401 register_command(): command 'l1' is already registered in 'cache' context
  208. Debug: 225 2 command.c:401 register_command(): command 'info' is already registered in 'l1' context
  209. Debug: 226 2 command.c:401 register_command(): command 'd' is already registered in 'l1' context
  210. Debug: 227 2 command.c:401 register_command(): command 'flush_all' is already registered in 'd' context
  211. Debug: 228 2 command.c:401 register_command(): command 'inval' is already registered in 'd' context
  212. Debug: 229 2 command.c:401 register_command(): command 'clean' is already registered in 'd' context
  213. Debug: 230 2 command.c:401 register_command(): command 'i' is already registered in 'l1' context
  214. Debug: 231 2 command.c:401 register_command(): command 'inval_all' is already registered in 'i' context
  215. Debug: 232 2 command.c:401 register_command(): command 'inval' is already registered in 'i' context
  216. Debug: 233 2 command.c:401 register_command(): command 'l2x' is already registered in 'cache' context
  217. Debug: 234 2 command.c:401 register_command(): command 'conf' is already registered in 'l2x' context
  218. Debug: 235 2 command.c:401 register_command(): command 'info' is already registered in 'l2x' context
  219. Debug: 236 2 command.c:401 register_command(): command 'flush_all' is already registered in 'l2x' context
  220. Debug: 237 2 command.c:401 register_command(): command 'flush' is already registered in 'l2x' context
  221. Debug: 238 2 command.c:401 register_command(): command 'inval' is already registered in 'l2x' context
  222. Debug: 239 2 command.c:401 register_command(): command 'clean' is already registered in 'l2x' context
  223. Debug: 240 2 command.c:401 register_command(): command 'cortex_a' is already registered in '<global>' context
  224. Debug: 241 2 command.c:401 register_command(): command 'cache_info' is already registered in 'cortex_a' context
  225. Debug: 242 2 command.c:401 register_command(): command 'dbginit' is already registered in 'cortex_a' context
  226. Debug: 243 2 command.c:401 register_command(): command 'smp_off' is already registered in 'cortex_a' context
  227. Debug: 244 2 command.c:401 register_command(): command 'smp_on' is already registered in 'cortex_a' context
  228. Debug: 245 2 command.c:401 register_command(): command 'smp_gdb' is already registered in 'cortex_a' context
  229. Debug: 246 2 command.c:401 register_command(): command 'maskisr' is already registered in 'cortex_a' context
  230. Debug: 247 2 command.c:401 register_command(): command 'dacrfixup' is already registered in 'cortex_a' context
  231. Debug: 248 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  232. Debug: 249 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  233. Debug: 250 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  234. Debug: 251 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  235. Debug: 252 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  236. Debug: 253 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  237. Debug: 254 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  238. Debug: 255 2 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  239. Debug: 256 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  240. Debug: 257 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  241. Debug: 258 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  242. Debug: 259 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  243. Debug: 260 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  244. Debug: 261 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  245. Debug: 262 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  246. Debug: 263 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  247. Debug: 264 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  248. Debug: 265 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  249. Debug: 266 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  250. Debug: 267 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  251. Debug: 268 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  252. Debug: 269 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  253. Debug: 270 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  254. Debug: 271 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  255. Debug: 272 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  256. Debug: 273 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  257. Debug: 274 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  258. Debug: 275 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  259. Debug: 276 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  260. Debug: 277 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  261. Debug: 278 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  262. Debug: 279 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  263. Debug: 280 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  264. Debug: 281 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  265. Debug: 282 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  266. Debug: 283 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  267. Debug: 284 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  268. Debug: 285 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  269. Debug: 286 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  270. Debug: 287 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  271. Debug: 288 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  272. Debug: 289 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  273. Debug: 290 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  274. Debug: 291 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  275. Debug: 292 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  276. Debug: 293 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  277. Debug: 294 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  278. Debug: 295 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  279. Debug: 296 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  280. Debug: 297 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  281. Debug: 298 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  282. Debug: 299 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  283. Debug: 300 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  284. Debug: 301 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  285. Debug: 302 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  286. Debug: 303 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  287. Debug: 304 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  288. Debug: 305 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  289. Debug: 306 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  290. Debug: 307 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  291. Debug: 308 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  292. Debug: 309 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu1'...
  293. Debug: 310 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create bcmrpi2.cpu2 cortex_a -chain-position bcmrpi2.dap -coreid 2 -dbgbase 0x80014000
  294. Debug: 311 3 command.c:145 script_debug(): command - ocd_target ocd_target create bcmrpi2.cpu2 cortex_a -chain-position bcmrpi2.dap -coreid 2 -dbgbase 0x80014000
  295. Debug: 312 3 target.c:1881 target_free_all_working_areas_restore(): freeing all working areas
  296. Debug: 313 3 command.c:401 register_command(): command 'arm' is already registered in '<global>' context
  297. Debug: 314 3 command.c:401 register_command(): command 'reg' is already registered in 'arm' context
  298. Debug: 315 3 command.c:401 register_command(): command 'core_state' is already registered in 'arm' context
  299. Debug: 316 3 command.c:401 register_command(): command 'disassemble' is already registered in 'arm' context
  300. Debug: 317 3 command.c:401 register_command(): command 'mcr' is already registered in 'arm' context
  301. Debug: 318 3 command.c:401 register_command(): command 'mrc' is already registered in 'arm' context
  302. Debug: 319 3 command.c:401 register_command(): command 'semihosting' is already registered in 'arm' context
  303. Debug: 320 3 command.c:401 register_command(): command 'dap' is already registered in '<global>' context
  304. Debug: 321 3 command.c:401 register_command(): command 'info' is already registered in 'dap' context
  305. Debug: 322 3 command.c:401 register_command(): command 'apsel' is already registered in 'dap' context
  306. Debug: 323 3 command.c:401 register_command(): command 'apcsw' is already registered in 'dap' context
  307. Debug: 324 3 command.c:401 register_command(): command 'apid' is already registered in 'dap' context
  308. Debug: 325 3 command.c:401 register_command(): command 'baseaddr' is already registered in 'dap' context
  309. Debug: 326 3 command.c:401 register_command(): command 'memaccess' is already registered in 'dap' context
  310. Debug: 327 3 command.c:401 register_command(): command 'ti_be_32_quirks' is already registered in 'dap' context
  311. Debug: 328 3 command.c:401 register_command(): command 'cache_config' is already registered in '<global>' context
  312. Debug: 329 3 command.c:401 register_command(): command 'l2x' is already registered in 'cache_config' context
  313. Debug: 330 3 command.c:401 register_command(): command 'cache' is already registered in '<global>' context
  314. Debug: 331 3 command.c:401 register_command(): command 'auto' is already registered in 'cache' context
  315. Debug: 332 3 command.c:401 register_command(): command 'l1' is already registered in 'cache' context
  316. Debug: 333 3 command.c:401 register_command(): command 'info' is already registered in 'l1' context
  317. Debug: 334 3 command.c:401 register_command(): command 'd' is already registered in 'l1' context
  318. Debug: 335 3 command.c:401 register_command(): command 'flush_all' is already registered in 'd' context
  319. Debug: 336 3 command.c:401 register_command(): command 'inval' is already registered in 'd' context
  320. Debug: 337 3 command.c:401 register_command(): command 'clean' is already registered in 'd' context
  321. Debug: 338 3 command.c:401 register_command(): command 'i' is already registered in 'l1' context
  322. Debug: 339 3 command.c:401 register_command(): command 'inval_all' is already registered in 'i' context
  323. Debug: 340 3 command.c:401 register_command(): command 'inval' is already registered in 'i' context
  324. Debug: 341 3 command.c:401 register_command(): command 'l2x' is already registered in 'cache' context
  325. Debug: 342 3 command.c:401 register_command(): command 'conf' is already registered in 'l2x' context
  326. Debug: 343 3 command.c:401 register_command(): command 'info' is already registered in 'l2x' context
  327. Debug: 344 3 command.c:401 register_command(): command 'flush_all' is already registered in 'l2x' context
  328. Debug: 345 3 command.c:401 register_command(): command 'flush' is already registered in 'l2x' context
  329. Debug: 346 3 command.c:401 register_command(): command 'inval' is already registered in 'l2x' context
  330. Debug: 347 3 command.c:401 register_command(): command 'clean' is already registered in 'l2x' context
  331. Debug: 348 3 command.c:401 register_command(): command 'cortex_a' is already registered in '<global>' context
  332. Debug: 349 3 command.c:401 register_command(): command 'cache_info' is already registered in 'cortex_a' context
  333. Debug: 350 3 command.c:401 register_command(): command 'dbginit' is already registered in 'cortex_a' context
  334. Debug: 351 3 command.c:401 register_command(): command 'smp_off' is already registered in 'cortex_a' context
  335. Debug: 352 3 command.c:401 register_command(): command 'smp_on' is already registered in 'cortex_a' context
  336. Debug: 353 3 command.c:401 register_command(): command 'smp_gdb' is already registered in 'cortex_a' context
  337. Debug: 354 3 command.c:401 register_command(): command 'maskisr' is already registered in 'cortex_a' context
  338. Debug: 355 3 command.c:401 register_command(): command 'dacrfixup' is already registered in 'cortex_a' context
  339. Debug: 356 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  340. Debug: 357 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  341. Debug: 358 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  342. Debug: 359 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  343. Debug: 360 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  344. Debug: 361 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  345. Debug: 362 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  346. Debug: 363 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  347. Debug: 364 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  348. Debug: 365 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  349. Debug: 366 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  350. Debug: 367 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  351. Debug: 368 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  352. Debug: 369 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  353. Debug: 370 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  354. Debug: 371 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  355. Debug: 372 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  356. Debug: 373 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  357. Debug: 374 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  358. Debug: 375 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  359. Debug: 376 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  360. Debug: 377 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  361. Debug: 378 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  362. Debug: 379 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  363. Debug: 380 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  364. Debug: 381 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  365. Debug: 382 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  366. Debug: 383 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  367. Debug: 384 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  368. Debug: 385 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  369. Debug: 386 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  370. Debug: 387 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  371. Debug: 388 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  372. Debug: 389 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  373. Debug: 390 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  374. Debug: 391 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  375. Debug: 392 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  376. Debug: 393 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  377. Debug: 394 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  378. Debug: 395 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  379. Debug: 396 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  380. Debug: 397 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  381. Debug: 398 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  382. Debug: 399 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  383. Debug: 400 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  384. Debug: 401 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  385. Debug: 402 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  386. Debug: 403 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  387. Debug: 404 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  388. Debug: 405 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  389. Debug: 406 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  390. Debug: 407 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  391. Debug: 408 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  392. Debug: 409 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  393. Debug: 410 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  394. Debug: 411 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  395. Debug: 412 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  396. Debug: 413 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  397. Debug: 414 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  398. Debug: 415 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  399. Debug: 416 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  400. Debug: 417 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu2'...
  401. Debug: 418 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create bcmrpi2.cpu3 cortex_a -chain-position bcmrpi2.dap -coreid 3 -dbgbase 0x80016000
  402. Debug: 419 3 command.c:145 script_debug(): command - ocd_target ocd_target create bcmrpi2.cpu3 cortex_a -chain-position bcmrpi2.dap -coreid 3 -dbgbase 0x80016000
  403. Debug: 420 3 target.c:1881 target_free_all_working_areas_restore(): freeing all working areas
  404. Debug: 421 3 command.c:401 register_command(): command 'arm' is already registered in '<global>' context
  405. Debug: 422 3 command.c:401 register_command(): command 'reg' is already registered in 'arm' context
  406. Debug: 423 3 command.c:401 register_command(): command 'core_state' is already registered in 'arm' context
  407. Debug: 424 3 command.c:401 register_command(): command 'disassemble' is already registered in 'arm' context
  408. Debug: 425 3 command.c:401 register_command(): command 'mcr' is already registered in 'arm' context
  409. Debug: 426 3 command.c:401 register_command(): command 'mrc' is already registered in 'arm' context
  410. Debug: 427 3 command.c:401 register_command(): command 'semihosting' is already registered in 'arm' context
  411. Debug: 428 3 command.c:401 register_command(): command 'dap' is already registered in '<global>' context
  412. Debug: 429 3 command.c:401 register_command(): command 'info' is already registered in 'dap' context
  413. Debug: 430 3 command.c:401 register_command(): command 'apsel' is already registered in 'dap' context
  414. Debug: 431 3 command.c:401 register_command(): command 'apcsw' is already registered in 'dap' context
  415. Debug: 432 3 command.c:401 register_command(): command 'apid' is already registered in 'dap' context
  416. Debug: 433 3 command.c:401 register_command(): command 'baseaddr' is already registered in 'dap' context
  417. Debug: 434 3 command.c:401 register_command(): command 'memaccess' is already registered in 'dap' context
  418. Debug: 435 3 command.c:401 register_command(): command 'ti_be_32_quirks' is already registered in 'dap' context
  419. Debug: 436 3 command.c:401 register_command(): command 'cache_config' is already registered in '<global>' context
  420. Debug: 437 3 command.c:401 register_command(): command 'l2x' is already registered in 'cache_config' context
  421. Debug: 438 3 command.c:401 register_command(): command 'cache' is already registered in '<global>' context
  422. Debug: 439 3 command.c:401 register_command(): command 'auto' is already registered in 'cache' context
  423. Debug: 440 3 command.c:401 register_command(): command 'l1' is already registered in 'cache' context
  424. Debug: 441 3 command.c:401 register_command(): command 'info' is already registered in 'l1' context
  425. Debug: 442 3 command.c:401 register_command(): command 'd' is already registered in 'l1' context
  426. Debug: 443 3 command.c:401 register_command(): command 'flush_all' is already registered in 'd' context
  427. Debug: 444 3 command.c:401 register_command(): command 'inval' is already registered in 'd' context
  428. Debug: 445 3 command.c:401 register_command(): command 'clean' is already registered in 'd' context
  429. Debug: 446 3 command.c:401 register_command(): command 'i' is already registered in 'l1' context
  430. Debug: 447 3 command.c:401 register_command(): command 'inval_all' is already registered in 'i' context
  431. Debug: 448 3 command.c:401 register_command(): command 'inval' is already registered in 'i' context
  432. Debug: 449 3 command.c:401 register_command(): command 'l2x' is already registered in 'cache' context
  433. Debug: 450 3 command.c:401 register_command(): command 'conf' is already registered in 'l2x' context
  434. Debug: 451 3 command.c:401 register_command(): command 'info' is already registered in 'l2x' context
  435. Debug: 452 3 command.c:401 register_command(): command 'flush_all' is already registered in 'l2x' context
  436. Debug: 453 3 command.c:401 register_command(): command 'flush' is already registered in 'l2x' context
  437. Debug: 454 3 command.c:401 register_command(): command 'inval' is already registered in 'l2x' context
  438. Debug: 455 3 command.c:401 register_command(): command 'clean' is already registered in 'l2x' context
  439. Debug: 456 3 command.c:401 register_command(): command 'cortex_a' is already registered in '<global>' context
  440. Debug: 457 3 command.c:401 register_command(): command 'cache_info' is already registered in 'cortex_a' context
  441. Debug: 458 3 command.c:401 register_command(): command 'dbginit' is already registered in 'cortex_a' context
  442. Debug: 459 3 command.c:401 register_command(): command 'smp_off' is already registered in 'cortex_a' context
  443. Debug: 460 3 command.c:401 register_command(): command 'smp_on' is already registered in 'cortex_a' context
  444. Debug: 461 3 command.c:401 register_command(): command 'smp_gdb' is already registered in 'cortex_a' context
  445. Debug: 462 3 command.c:401 register_command(): command 'maskisr' is already registered in 'cortex_a' context
  446. Debug: 463 3 command.c:401 register_command(): command 'dacrfixup' is already registered in 'cortex_a' context
  447. Debug: 464 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  448. Debug: 465 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  449. Debug: 466 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  450. Debug: 467 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  451. Debug: 468 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  452. Debug: 469 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  453. Debug: 470 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  454. Debug: 471 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  455. Debug: 472 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  456. Debug: 473 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  457. Debug: 474 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  458. Debug: 475 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  459. Debug: 476 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  460. Debug: 477 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  461. Debug: 478 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  462. Debug: 479 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  463. Debug: 480 3 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  464. Debug: 481 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  465. Debug: 482 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  466. Debug: 483 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  467. Debug: 484 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  468. Debug: 485 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  469. Debug: 486 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  470. Debug: 487 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  471. Debug: 488 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  472. Debug: 489 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  473. Debug: 490 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  474. Debug: 491 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  475. Debug: 492 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  476. Debug: 493 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  477. Debug: 494 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  478. Debug: 495 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  479. Debug: 496 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  480. Debug: 497 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  481. Debug: 498 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  482. Debug: 499 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  483. Debug: 500 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  484. Debug: 501 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  485. Debug: 502 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  486. Debug: 503 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  487. Debug: 504 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  488. Debug: 505 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  489. Debug: 506 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  490. Debug: 507 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  491. Debug: 508 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  492. Debug: 509 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  493. Debug: 510 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  494. Debug: 511 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  495. Debug: 512 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  496. Debug: 513 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  497. Debug: 514 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  498. Debug: 515 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  499. Debug: 516 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  500. Debug: 517 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  501. Debug: 518 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  502. Debug: 519 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  503. Debug: 520 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  504. Debug: 521 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  505. Debug: 522 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  506. Debug: 523 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  507. Debug: 524 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  508. Debug: 525 4 command.c:366 register_command_handler(): registering 'ocd_bcmrpi2.cpu3'...
  509. Debug: 526 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target smp bcmrpi2.cpu0 bcmrpi2.cpu1 bcmrpi2.cpu2 bcmrpi2.cpu3
  510. Debug: 527 4 command.c:145 script_debug(): command - ocd_target ocd_target smp bcmrpi2.cpu0 bcmrpi2.cpu1 bcmrpi2.cpu2 bcmrpi2.cpu3
  511. Debug: 528 4 target.c:5437 jim_target_smp(): 5
  512. Debug: 529 4 target.c:5447 jim_target_smp(): bcmrpi2.cpu0
  513. Debug: 530 4 target.c:5447 jim_target_smp(): bcmrpi2.cpu1
  514. Debug: 531 4 target.c:5447 jim_target_smp(): bcmrpi2.cpu2
  515. Debug: 532 4 target.c:5447 jim_target_smp(): bcmrpi2.cpu3
  516. Debug: 533 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu0 configure -event gdb-attach
  517. cortex_a dbginit
  518.  
  519. Debug: 534 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu0 ocd_bcmrpi2.cpu0 configure -event gdb-attach
  520. cortex_a dbginit
  521.  
  522. Debug: 535 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu1 configure -event gdb-attach
  523. cortex_a dbginit
  524.  
  525. Debug: 536 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu1 ocd_bcmrpi2.cpu1 configure -event gdb-attach
  526. cortex_a dbginit
  527.  
  528. Debug: 537 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu2 configure -event gdb-attach
  529. cortex_a dbginit
  530.  
  531. Debug: 538 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu2 ocd_bcmrpi2.cpu2 configure -event gdb-attach
  532. cortex_a dbginit
  533.  
  534. Debug: 539 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu3 configure -event gdb-attach
  535. cortex_a dbginit
  536.  
  537. Debug: 540 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu3 ocd_bcmrpi2.cpu3 configure -event gdb-attach
  538. cortex_a dbginit
  539.  
  540. Debug: 541 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_init
  541. Debug: 542 4 command.c:145 script_debug(): command - init ocd_init
  542. Debug: 544 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target init
  543. Debug: 545 4 command.c:145 script_debug(): command - ocd_target ocd_target init
  544. Debug: 547 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
  545. Debug: 548 4 command.c:145 script_debug(): command - ocd_target ocd_target names
  546. Debug: 549 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu0 cget -event gdb-flash-erase-start
  547. Debug: 550 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu0 ocd_bcmrpi2.cpu0 cget -event gdb-flash-erase-start
  548. Debug: 551 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu0 configure -event gdb-flash-erase-start reset init
  549. Debug: 552 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu0 ocd_bcmrpi2.cpu0 configure -event gdb-flash-erase-start reset init
  550. Debug: 553 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu0 cget -event gdb-flash-write-end
  551. Debug: 554 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu0 ocd_bcmrpi2.cpu0 cget -event gdb-flash-write-end
  552. Debug: 555 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu0 configure -event gdb-flash-write-end reset halt
  553. Debug: 556 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu0 ocd_bcmrpi2.cpu0 configure -event gdb-flash-write-end reset halt
  554. Debug: 557 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu1 cget -event gdb-flash-erase-start
  555. Debug: 558 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu1 ocd_bcmrpi2.cpu1 cget -event gdb-flash-erase-start
  556. Debug: 559 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu1 configure -event gdb-flash-erase-start reset init
  557. Debug: 560 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu1 ocd_bcmrpi2.cpu1 configure -event gdb-flash-erase-start reset init
  558. Debug: 561 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu1 cget -event gdb-flash-write-end
  559. Debug: 562 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu1 ocd_bcmrpi2.cpu1 cget -event gdb-flash-write-end
  560. Debug: 563 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu1 configure -event gdb-flash-write-end reset halt
  561. Debug: 564 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu1 ocd_bcmrpi2.cpu1 configure -event gdb-flash-write-end reset halt
  562. Debug: 565 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu2 cget -event gdb-flash-erase-start
  563. Debug: 566 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu2 ocd_bcmrpi2.cpu2 cget -event gdb-flash-erase-start
  564. Debug: 567 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu2 configure -event gdb-flash-erase-start reset init
  565. Debug: 568 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu2 ocd_bcmrpi2.cpu2 configure -event gdb-flash-erase-start reset init
  566. Debug: 569 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu2 cget -event gdb-flash-write-end
  567. Debug: 570 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu2 ocd_bcmrpi2.cpu2 cget -event gdb-flash-write-end
  568. Debug: 571 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu2 configure -event gdb-flash-write-end reset halt
  569. Debug: 572 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu2 ocd_bcmrpi2.cpu2 configure -event gdb-flash-write-end reset halt
  570. Debug: 573 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu3 cget -event gdb-flash-erase-start
  571. Debug: 574 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu3 ocd_bcmrpi2.cpu3 cget -event gdb-flash-erase-start
  572. Debug: 575 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu3 configure -event gdb-flash-erase-start reset init
  573. Debug: 576 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu3 ocd_bcmrpi2.cpu3 configure -event gdb-flash-erase-start reset init
  574. Debug: 577 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu3 cget -event gdb-flash-write-end
  575. Debug: 578 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu3 ocd_bcmrpi2.cpu3 cget -event gdb-flash-write-end
  576. Debug: 579 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_bcmrpi2.cpu3 configure -event gdb-flash-write-end reset halt
  577. Debug: 580 4 command.c:145 script_debug(): command - ocd_bcmrpi2.cpu3 ocd_bcmrpi2.cpu3 configure -event gdb-flash-write-end reset halt
  578. Debug: 581 4 target.c:1306 handle_target_init_command(): Initializing targets...
  579. Debug: 582 4 command.c:366 register_command_handler(): registering 'ocd_target_request'...
  580. Debug: 583 4 command.c:366 register_command_handler(): registering 'ocd_trace'...
  581. Debug: 584 4 command.c:366 register_command_handler(): registering 'ocd_trace'...
  582. Debug: 585 4 command.c:366 register_command_handler(): registering 'ocd_fast_load_image'...
  583. Debug: 586 4 command.c:366 register_command_handler(): registering 'ocd_fast_load'...
  584. Debug: 587 4 command.c:366 register_command_handler(): registering 'ocd_profile'...
  585. Debug: 588 4 command.c:366 register_command_handler(): registering 'ocd_virt2phys'...
  586. Debug: 589 4 command.c:366 register_command_handler(): registering 'ocd_reg'...
  587. Debug: 590 4 command.c:366 register_command_handler(): registering 'ocd_poll'...
  588. Debug: 591 4 command.c:366 register_command_handler(): registering 'ocd_wait_halt'...
  589. Debug: 592 4 command.c:366 register_command_handler(): registering 'ocd_halt'...
  590. Debug: 593 4 command.c:366 register_command_handler(): registering 'ocd_resume'...
  591. Debug: 594 4 command.c:366 register_command_handler(): registering 'ocd_reset'...
  592. Debug: 595 4 command.c:366 register_command_handler(): registering 'ocd_soft_reset_halt'...
  593. Debug: 596 4 command.c:366 register_command_handler(): registering 'ocd_step'...
  594. Debug: 597 4 command.c:366 register_command_handler(): registering 'ocd_mdw'...
  595. Debug: 598 4 command.c:366 register_command_handler(): registering 'ocd_mdh'...
  596. Debug: 599 4 command.c:366 register_command_handler(): registering 'ocd_mdb'...
  597. Debug: 600 4 command.c:366 register_command_handler(): registering 'ocd_mww'...
  598. Debug: 601 5 command.c:366 register_command_handler(): registering 'ocd_mwh'...
  599. Debug: 602 5 command.c:366 register_command_handler(): registering 'ocd_mwb'...
  600. Debug: 603 5 command.c:366 register_command_handler(): registering 'ocd_bp'...
  601. Debug: 604 5 command.c:366 register_command_handler(): registering 'ocd_rbp'...
  602. Debug: 605 5 command.c:366 register_command_handler(): registering 'ocd_wp'...
  603. Debug: 606 5 command.c:366 register_command_handler(): registering 'ocd_rwp'...
  604. Debug: 607 5 command.c:366 register_command_handler(): registering 'ocd_load_image'...
  605. Debug: 608 5 command.c:366 register_command_handler(): registering 'ocd_dump_image'...
  606. Debug: 609 5 command.c:366 register_command_handler(): registering 'ocd_verify_image'...
  607. Debug: 610 5 command.c:366 register_command_handler(): registering 'ocd_test_image'...
  608. Debug: 611 5 command.c:366 register_command_handler(): registering 'ocd_reset_nag'...
  609. Debug: 612 5 command.c:366 register_command_handler(): registering 'ocd_ps'...
  610. Debug: 613 5 command.c:366 register_command_handler(): registering 'ocd_test_mem_access'...
  611. Debug: 614 5 ftdi.c:625 ftdi_initialize(): ftdi interface using shortest path jtag state transitions
  612. Debug: 615 9 mpsse.c:363 mpsse_purge(): -
  613. Debug: 616 10 mpsse.c:644 mpsse_loopback_config(): off
  614. Debug: 617 10 mpsse.c:689 mpsse_set_frequency(): target 1000000 Hz
  615. Debug: 618 10 mpsse.c:681 mpsse_rtck_config(): off
  616. Debug: 619 10 mpsse.c:670 mpsse_divide_by_5_config(): off
  617. Debug: 620 10 mpsse.c:650 mpsse_set_divisor(): 29
  618. Debug: 621 10 mpsse.c:713 mpsse_set_frequency(): actually 1000000 Hz
  619. Debug: 622 13 core.c:1596 adapter_khz_to_speed(): convert khz to interface specific speed value
  620. Debug: 623 13 core.c:1599 adapter_khz_to_speed(): have interface set up
  621. Debug: 624 13 mpsse.c:689 mpsse_set_frequency(): target 1000000 Hz
  622. Debug: 625 13 mpsse.c:681 mpsse_rtck_config(): off
  623. Debug: 626 13 mpsse.c:670 mpsse_divide_by_5_config(): off
  624. Debug: 627 13 mpsse.c:650 mpsse_set_divisor(): 29
  625. Debug: 628 13 mpsse.c:713 mpsse_set_frequency(): actually 1000000 Hz
  626. Debug: 629 13 core.c:1596 adapter_khz_to_speed(): convert khz to interface specific speed value
  627. Debug: 630 13 core.c:1599 adapter_khz_to_speed(): have interface set up
  628. Info : 631 13 core.c:1384 adapter_init(): clock speed 1000 kHz
  629. Debug: 632 13 openocd.c:146 handle_init_command(): Debug Adapter init complete
  630. Debug: 633 13 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport init
  631. Debug: 634 13 command.c:145 script_debug(): command - ocd_transport ocd_transport init
  632. Debug: 636 13 transport.c:240 handle_transport_init(): handle_transport_init
  633. Debug: 637 13 core.c:730 jtag_add_reset(): SRST line released
  634. Debug: 638 13 core.c:754 jtag_add_reset(): TRST line released
  635. Debug: 639 13 core.c:328 jtag_call_event_callbacks(): jtag event: TAP reset
  636. Debug: 640 13 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_jtag arp_init
  637. Debug: 641 14 command.c:145 script_debug(): command - ocd_jtag ocd_jtag arp_init
  638. Debug: 642 14 core.c:1397 jtag_init_inner(): Init JTAG chain
  639. Debug: 643 14 core.c:328 jtag_call_event_callbacks(): jtag event: TAP reset
  640. Debug: 644 14 core.c:1058 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
  641. Debug: 645 14 core.c:328 jtag_call_event_callbacks(): jtag event: TAP reset
  642. Info : 646 15 core.c:958 jtag_examine_chain_display(): JTAG tap: bcmrpi2.dap tap/device found: 0x4ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x4)
  643. Debug: 647 15 core.c:1188 jtag_validate_ircapture(): IR capture validation scan
  644. Debug: 648 16 core.c:1246 jtag_validate_ircapture(): bcmrpi2.dap: IR capture 0x01
  645. Debug: 649 16 openocd.c:159 handle_init_command(): Examining targets...
  646. Debug: 650 16 target.c:1499 target_call_event_callbacks(): target event 21 (examine-start)
  647. Debug: 651 16 arm_adi_v5.c:602 dap_dp_init():
  648. Debug: 652 16 arm_adi_v5.c:635 dap_dp_init(): DAP: wait CDBGPWRUPACK
  649. Debug: 653 16 arm_adi_v5.h:417 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
  650. Debug: 654 16 arm_adi_v5.c:642 dap_dp_init(): DAP: wait CSYSPWRUPACK
  651. Debug: 655 16 arm_adi_v5.h:417 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000
  652. Debug: 656 18 arm_adi_v5.c:787 dap_find_ap(): Found APB-AP at AP index: 0 (IDR=0x24770002)
  653. Debug: 657 19 arm_adi_v5.c:713 mem_ap_init(): MEM_AP Packed Transfers: disabled
  654. Debug: 658 19 arm_adi_v5.c:724 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0
  655. Debug: 659 129 arm_adi_v5.c:798 dap_find_ap(): No AHB-AP found
  656. Debug: 660 129 cortex_a.c:2972 cortex_a_examine_first(): Could not find AHB-AP - using APB-AP for memory access
  657. Debug: 661 131 cortex_a.c:3031 cortex_a_examine_first(): cpuid = 0x410fc075
  658. Debug: 662 131 cortex_a.c:3032 cortex_a_examine_first(): ctypr = 0x84448003
  659. Debug: 663 131 cortex_a.c:3033 cortex_a_examine_first(): ttypr = 0x00000000
  660. Debug: 664 131 cortex_a.c:3034 cortex_a_examine_first(): didr = 0x3515f005
  661. Debug: 665 132 cortex_a.c:3071 cortex_a_examine_first(): target->coreid 0 DBGPRSR 0xb
  662. Info : 666 132 arm_dpm.c:987 arm_dpm_setup(): bcmrpi2.cpu0: hardware has 6 breakpoints, 4 watchpoints
  663. Debug: 667 132 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80010140
  664. Debug: 668 133 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80010144
  665. Debug: 669 134 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80010148
  666. Debug: 670 134 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 8001014c
  667. Debug: 671 134 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80010150
  668. Debug: 672 135 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80010154
  669. Debug: 673 135 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800101c0
  670. Debug: 674 136 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800101c4
  671. Debug: 675 137 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800101c8
  672. Debug: 676 137 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800101cc
  673. Debug: 677 137 cortex_a.c:3100 cortex_a_examine_first(): Configured 6 hw breakpoints
  674. Debug: 678 137 cortex_a.c:236 cortex_a_init_debug_access():
  675. Debug: 679 138 cortex_a.c:249 cortex_a_init_debug_access(): DBGOSLSR 0x8
  676. Debug: 680 139 cortex_a.c:271 cortex_a_init_debug_access(): target->coreid 0 DBGPRSR 0x1
  677. Debug: 681 140 target.c:1499 target_call_event_callbacks(): target event 22 (examine-end)
  678. Debug: 682 140 target.c:1499 target_call_event_callbacks(): target event 21 (examine-start)
  679. Debug: 683 140 arm_adi_v5.c:602 dap_dp_init():
  680. Debug: 684 140 arm_adi_v5.c:635 dap_dp_init(): DAP: wait CDBGPWRUPACK
  681. Debug: 685 140 arm_adi_v5.h:417 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
  682. Debug: 686 141 arm_adi_v5.c:642 dap_dp_init(): DAP: wait CSYSPWRUPACK
  683. Debug: 687 141 arm_adi_v5.h:417 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000
  684. Debug: 688 142 arm_adi_v5.c:787 dap_find_ap(): Found APB-AP at AP index: 0 (IDR=0x24770002)
  685. Debug: 689 143 arm_adi_v5.c:713 mem_ap_init(): MEM_AP Packed Transfers: disabled
  686. Debug: 690 144 arm_adi_v5.c:724 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0
  687. Debug: 691 248 arm_adi_v5.c:798 dap_find_ap(): No AHB-AP found
  688. Debug: 692 248 cortex_a.c:2972 cortex_a_examine_first(): Could not find AHB-AP - using APB-AP for memory access
  689. Debug: 693 251 cortex_a.c:3031 cortex_a_examine_first(): cpuid = 0x410fc075
  690. Debug: 694 251 cortex_a.c:3032 cortex_a_examine_first(): ctypr = 0x84448003
  691. Debug: 695 251 cortex_a.c:3033 cortex_a_examine_first(): ttypr = 0x00000000
  692. Debug: 696 251 cortex_a.c:3034 cortex_a_examine_first(): didr = 0x3515f005
  693. Debug: 697 252 cortex_a.c:3071 cortex_a_examine_first(): target->coreid 1 DBGPRSR 0xb
  694. Info : 698 252 arm_dpm.c:987 arm_dpm_setup(): bcmrpi2.cpu1: hardware has 6 breakpoints, 4 watchpoints
  695. Debug: 699 252 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80012140
  696. Debug: 700 252 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80012144
  697. Debug: 701 253 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80012148
  698. Debug: 702 253 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 8001214c
  699. Debug: 703 254 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80012150
  700. Debug: 704 254 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80012154
  701. Debug: 705 255 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800121c0
  702. Debug: 706 255 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800121c4
  703. Debug: 707 256 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800121c8
  704. Debug: 708 256 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800121cc
  705. Debug: 709 256 cortex_a.c:3100 cortex_a_examine_first(): Configured 6 hw breakpoints
  706. Debug: 710 256 cortex_a.c:236 cortex_a_init_debug_access():
  707. Debug: 711 257 cortex_a.c:249 cortex_a_init_debug_access(): DBGOSLSR 0x8
  708. Debug: 712 258 cortex_a.c:271 cortex_a_init_debug_access(): target->coreid 1 DBGPRSR 0x1
  709. Debug: 713 259 target.c:1499 target_call_event_callbacks(): target event 22 (examine-end)
  710. Debug: 714 259 target.c:1499 target_call_event_callbacks(): target event 21 (examine-start)
  711. Debug: 715 259 arm_adi_v5.c:602 dap_dp_init():
  712. Debug: 716 259 arm_adi_v5.c:635 dap_dp_init(): DAP: wait CDBGPWRUPACK
  713. Debug: 717 259 arm_adi_v5.h:417 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
  714. Debug: 718 260 arm_adi_v5.c:642 dap_dp_init(): DAP: wait CSYSPWRUPACK
  715. Debug: 719 260 arm_adi_v5.h:417 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000
  716. Debug: 720 261 arm_adi_v5.c:787 dap_find_ap(): Found APB-AP at AP index: 0 (IDR=0x24770002)
  717. Debug: 721 262 arm_adi_v5.c:713 mem_ap_init(): MEM_AP Packed Transfers: disabled
  718. Debug: 722 262 arm_adi_v5.c:724 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0
  719. Debug: 723 368 arm_adi_v5.c:798 dap_find_ap(): No AHB-AP found
  720. Debug: 724 368 cortex_a.c:2972 cortex_a_examine_first(): Could not find AHB-AP - using APB-AP for memory access
  721. Debug: 725 371 cortex_a.c:3031 cortex_a_examine_first(): cpuid = 0x410fc075
  722. Debug: 726 371 cortex_a.c:3032 cortex_a_examine_first(): ctypr = 0x84448003
  723. Debug: 727 371 cortex_a.c:3033 cortex_a_examine_first(): ttypr = 0x00000000
  724. Debug: 728 371 cortex_a.c:3034 cortex_a_examine_first(): didr = 0x3515f005
  725. Debug: 729 372 cortex_a.c:3071 cortex_a_examine_first(): target->coreid 2 DBGPRSR 0xb
  726. Info : 730 372 arm_dpm.c:987 arm_dpm_setup(): bcmrpi2.cpu2: hardware has 6 breakpoints, 4 watchpoints
  727. Debug: 731 372 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80014140
  728. Debug: 732 373 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80014144
  729. Debug: 733 373 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80014148
  730. Debug: 734 373 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 8001414c
  731. Debug: 735 374 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80014150
  732. Debug: 736 374 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80014154
  733. Debug: 737 375 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800141c0
  734. Debug: 738 376 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800141c4
  735. Debug: 739 376 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800141c8
  736. Debug: 740 376 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800141cc
  737. Debug: 741 377 cortex_a.c:3100 cortex_a_examine_first(): Configured 6 hw breakpoints
  738. Debug: 742 377 cortex_a.c:236 cortex_a_init_debug_access():
  739. Debug: 743 377 cortex_a.c:249 cortex_a_init_debug_access(): DBGOSLSR 0x8
  740. Debug: 744 378 cortex_a.c:271 cortex_a_init_debug_access(): target->coreid 2 DBGPRSR 0x1
  741. Debug: 745 379 target.c:1499 target_call_event_callbacks(): target event 22 (examine-end)
  742. Debug: 746 379 target.c:1499 target_call_event_callbacks(): target event 21 (examine-start)
  743. Debug: 747 379 arm_adi_v5.c:602 dap_dp_init():
  744. Debug: 748 379 arm_adi_v5.c:635 dap_dp_init(): DAP: wait CDBGPWRUPACK
  745. Debug: 749 379 arm_adi_v5.h:417 dap_dp_poll_register(): DAP: poll 4, mask 0x20000000, value 0x20000000
  746. Debug: 750 380 arm_adi_v5.c:642 dap_dp_init(): DAP: wait CSYSPWRUPACK
  747. Debug: 751 380 arm_adi_v5.h:417 dap_dp_poll_register(): DAP: poll 4, mask 0x80000000, value 0x80000000
  748. Debug: 752 382 arm_adi_v5.c:787 dap_find_ap(): Found APB-AP at AP index: 0 (IDR=0x24770002)
  749. Debug: 753 382 arm_adi_v5.c:713 mem_ap_init(): MEM_AP Packed Transfers: disabled
  750. Debug: 754 382 arm_adi_v5.c:724 mem_ap_init(): MEM_AP CFG: large data 0, long address 0, big-endian 0
  751. Debug: 755 490 arm_adi_v5.c:798 dap_find_ap(): No AHB-AP found
  752. Debug: 756 490 cortex_a.c:2972 cortex_a_examine_first(): Could not find AHB-AP - using APB-AP for memory access
  753. Debug: 757 492 cortex_a.c:3031 cortex_a_examine_first(): cpuid = 0x410fc075
  754. Debug: 758 492 cortex_a.c:3032 cortex_a_examine_first(): ctypr = 0x84448003
  755. Debug: 759 492 cortex_a.c:3033 cortex_a_examine_first(): ttypr = 0x00000000
  756. Debug: 760 492 cortex_a.c:3034 cortex_a_examine_first(): didr = 0x3515f005
  757. Debug: 761 494 cortex_a.c:3071 cortex_a_examine_first(): target->coreid 3 DBGPRSR 0xb
  758. Info : 762 494 arm_dpm.c:987 arm_dpm_setup(): bcmrpi2.cpu3: hardware has 6 breakpoints, 4 watchpoints
  759. Debug: 763 494 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80016140
  760. Debug: 764 494 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80016144
  761. Debug: 765 495 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80016148
  762. Debug: 766 495 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 8001614c
  763. Debug: 767 495 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80016150
  764. Debug: 768 496 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 80016154
  765. Debug: 769 496 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800161c0
  766. Debug: 770 497 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800161c4
  767. Debug: 771 497 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800161c8
  768. Debug: 772 498 cortex_a.c:800 cortex_a_bpwp_disable(): A: bpwp disable, cr 800161cc
  769. Debug: 773 499 cortex_a.c:3100 cortex_a_examine_first(): Configured 6 hw breakpoints
  770. Debug: 774 499 cortex_a.c:236 cortex_a_init_debug_access():
  771. Debug: 775 499 cortex_a.c:249 cortex_a_init_debug_access(): DBGOSLSR 0x8
  772. Debug: 776 500 cortex_a.c:271 cortex_a_init_debug_access(): target->coreid 3 DBGPRSR 0x1
  773. Debug: 778 502 target.c:1499 target_call_event_callbacks(): target event 22 (examine-end)
  774. Debug: 779 502 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash init
  775. Debug: 780 502 command.c:145 script_debug(): command - ocd_flash ocd_flash init
  776. Debug: 782 505 tcl.c:1067 handle_flash_init_command(): Initializing flash devices...
  777. Debug: 783 505 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mflash init
  778. Debug: 784 505 command.c:145 script_debug(): command - ocd_mflash ocd_mflash init
  779. Debug: 786 508 mflash.c:1379 handle_mflash_init_command(): Initializing mflash devices...
  780. Debug: 787 508 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_nand init
  781. Debug: 788 508 command.c:145 script_debug(): command - ocd_nand ocd_nand init
  782. Debug: 790 511 tcl.c:497 handle_nand_init_command(): Initializing NAND devices...
  783. Debug: 791 511 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_pld init
  784. Debug: 792 511 command.c:145 script_debug(): command - ocd_pld ocd_pld init
  785. Debug: 794 513 pld.c:207 handle_pld_init_command(): Initializing PLDs...
  786. Info : 795 10115 server.c:91 add_connection(): accepting 'telnet' connection on tcp/4444
  787. Debug: 796 12498 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_halt
  788. Debug: 797 12498 command.c:145 script_debug(): command - halt ocd_halt
  789. Debug: 799 12502 target.c:2804 handle_halt_command(): -
  790. Debug: 800 12506 cortex_a.c:907 cortex_a_poll(): Target halted
  791. Debug: 801 12506 cortex_a.c:1214 cortex_a_debug_entry(): dscr = 0x030c4003
  792. Debug: 802 12508 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  793. Debug: 803 12509 arm_dpm.c:186 dpm_read_reg(): READ: r0, 00000003
  794. Debug: 804 12509 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe10f0000
  795. Debug: 805 12509 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  796. Error: 806 12511 armv4_5.c:204 arm_mode_to_number(): invalid mode value encountered 26
  797. Debug: 807 12511 armv4_5.c:422 arm_set_cpsr(): set CPSR 0x600001da: User mode, ARM state
  798. Debug: 808 12511 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee001e15
  799. Debug: 809 12512 arm_dpm.c:186 dpm_read_reg(): READ: r1, 00000131
  800. Debug: 810 12512 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee002e15
  801. Debug: 811 12513 arm_dpm.c:186 dpm_read_reg(): READ: r2, fbfcfbe6
  802. Debug: 812 12513 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee003e15
  803. Debug: 813 12514 arm_dpm.c:186 dpm_read_reg(): READ: r3, 00000000
  804. Debug: 814 12514 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee004e15
  805. Debug: 815 12515 arm_dpm.c:186 dpm_read_reg(): READ: r4, 00000000
  806. Debug: 816 12515 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee005e15
  807. Debug: 817 12516 arm_dpm.c:186 dpm_read_reg(): READ: r5, 400000cc
  808. Debug: 818 12516 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee006e15
  809. Debug: 819 12519 arm_dpm.c:186 dpm_read_reg(): READ: r6, 4d5e9a5e
  810. Debug: 820 12519 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee007e15
  811. Debug: 821 12520 arm_dpm.c:186 dpm_read_reg(): READ: r7, de7bcc65
  812. Debug: 822 12520 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee008e15
  813. Debug: 823 12521 arm_dpm.c:186 dpm_read_reg(): READ: r8, 79d407e2
  814. Debug: 824 12521 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee009e15
  815. Debug: 825 12523 arm_dpm.c:186 dpm_read_reg(): READ: r9, 3917dbfe
  816. Debug: 826 12523 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ae15
  817. Debug: 827 12524 arm_dpm.c:186 dpm_read_reg(): READ: r10, a9db8a7b
  818. Debug: 828 12524 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00be15
  819. Debug: 829 12525 arm_dpm.c:186 dpm_read_reg(): READ: r11, 66be97bf
  820. Debug: 830 12525 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ce15
  821. Debug: 831 12526 arm_dpm.c:186 dpm_read_reg(): READ: r12, 00000000
  822. Debug: 832 12526 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00de15
  823. Debug: 833 12527 arm_dpm.c:186 dpm_read_reg(): READ: sp_usr, bf8fbabb
  824. Debug: 834 12527 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ee15
  825. Debug: 835 12528 arm_dpm.c:186 dpm_read_reg(): READ: lr_usr, fab3bbfc
  826. Debug: 836 12528 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe1a0000f
  827. Debug: 837 12529 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  828. Debug: 838 12530 arm_dpm.c:186 dpm_read_reg(): READ: pc, 000000cc
  829. Debug: 839 12530 arm_dpm.c:67 dpm_mrc(): MRC p15, 0, r0, c1, c0, 0
  830. Debug: 840 12530 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee110f10
  831. Debug: 841 12531 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  832. Debug: 842 12532 cortex_a.c:1336 cortex_a_post_debug_entry(): cp15_control_reg: 00c50878
  833. Debug: 843 12533 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee120f50
  834. Debug: 844 12533 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  835. Debug: 845 12535 armv7a.c:144 armv7a_read_ttbcr(): ttbcr 0
  836. Debug: 846 12535 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100f10
  837. Debug: 847 12536 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  838. Info : 848 12537 armv7a.c:122 armv7a_read_midr(): bcmrpi2.cpu3 rev 5, partnum c07, arch f, variant 0, implementor 41
  839. Debug: 849 12537 armv7a.c:173 armv7a_read_ttbcr(): ttbr1 not used, ttbr0_mask ffffc000 ttbr1_mask ffffc000
  840. Debug: 850 12537 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100f30
  841. Debug: 851 12538 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  842. Debug: 852 12539 armv7a.c:588 armv7a_identify_cache(): ctr 84448003 ctr.iminline 32 ctr.dminline 64
  843. Debug: 853 12539 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f30
  844. Debug: 854 12541 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  845. Debug: 855 12542 armv7a.c:599 armv7a_identify_cache(): Number of cache levels to PoC 2
  846. Debug: 856 12542 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee500f10
  847. Debug: 857 12543 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  848. Debug: 858 12544 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000000
  849. Debug: 859 12544 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  850. Debug: 860 12545 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  851. Debug: 861 12546 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  852. Debug: 862 12546 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  853. Debug: 863 12547 armv7a.c:631 armv7a_identify_cache(): data/unified cache index 127 << 6, way 3 << 30
  854. Debug: 864 12547 armv7a.c:636 armv7a_identify_cache(): cacheline 64 bytes 32 KBytes asso 4 ways
  855. Debug: 865 12547 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000001
  856. Debug: 866 12547 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  857. Debug: 867 12548 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  858. Debug: 868 12549 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  859. Debug: 869 12549 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  860. Debug: 870 12550 armv7a.c:651 armv7a_identify_cache(): instruction cache index 511 << 5, way 1 << 31
  861. Debug: 871 12550 armv7a.c:656 armv7a_identify_cache(): cacheline 32 bytes 32 KBytes asso 2 ways
  862. Debug: 872 12550 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000002
  863. Debug: 873 12550 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  864. Debug: 874 12551 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  865. Debug: 875 12552 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  866. Debug: 876 12552 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  867. Debug: 877 12553 armv7a.c:631 armv7a_identify_cache(): data/unified cache index 1023 << 6, way 7 << 29
  868. Debug: 878 12553 armv7a.c:636 armv7a_identify_cache(): cacheline 64 bytes 512 KBytes asso 8 ways
  869. Debug: 879 12553 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000000
  870. Debug: 880 12553 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  871. Debug: 881 12554 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee500f10
  872. Debug: 882 12555 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100fb0
  873. Debug: 883 12556 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  874. Info : 884 12557 armv7a.c:506 armv7a_read_mpidr(): bcmrpi2.cpu3 cluster f core 3 multi core
  875. Debug: 885 12557 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000013
  876. Debug: 886 12557 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  877. Debug: 887 12558 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe12ff000
  878. Debug: 888 12558 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee070f95
  879. Debug: 889 12559 arm_dpm.c:67 dpm_mrc(): MRC p15, 0, r0, c3, c0, 0
  880. Debug: 890 12559 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee130f10
  881. Debug: 891 12560 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  882. Debug: 892 12561 cortex_a.c:1361 cortex_a_post_debug_entry(): cp15_dacr_reg: a47202b4
  883. Debug: 893 12561 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x600001da
  884. Debug: 894 12561 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  885. Debug: 895 12562 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe12ff000
  886. Debug: 896 12562 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee070f95
  887. Debug: 897 12569 target.c:1499 target_call_event_callbacks(): target event 0 (gdb-halt)
  888. Debug: 898 12569 target.c:1499 target_call_event_callbacks(): target event 1 (halted)
  889. User : 899 12569 target.c:1934 target_arch_state(): bcmrpi2.cpu3: target state: halted
  890. Error: 900 12570 armv4_5.c:167 arm_mode_name(): unrecognized psr mode: 0x1a
  891. User : 901 12570 armv4_5.c:671 arm_arch_state(): target halted in ARM state due to debug-request, current mode: UNRECOGNIZED
  892. cpsr: 0x600001da pc: 0x000000cc
  893. User : 902 12570 armv7a.c:724 armv7a_arch_state(): MMU: disabled, D-Cache: disabled, I-Cache: disabled
  894. Debug: 903 12672 cortex_a.c:907 cortex_a_poll(): Target halted
  895. Debug: 904 12672 cortex_a.c:1214 cortex_a_debug_entry(): dscr = 0x030c4003
  896. Debug: 905 12674 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  897. Debug: 906 12676 arm_dpm.c:186 dpm_read_reg(): READ: r0, 011e7da1
  898. Debug: 907 12676 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe10f0000
  899. Debug: 908 12676 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  900. Error: 909 12678 armv4_5.c:204 arm_mode_to_number(): invalid mode value encountered 26
  901. Debug: 910 12678 armv4_5.c:422 arm_set_cpsr(): set CPSR 0x800001da: User mode, ARM state
  902. Debug: 911 12678 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee001e15
  903. Debug: 912 12679 arm_dpm.c:186 dpm_read_reg(): READ: r1, 00008000
  904. Debug: 913 12680 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee002e15
  905. Debug: 914 12681 arm_dpm.c:186 dpm_read_reg(): READ: r2, 00000100
  906. Debug: 915 12681 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee003e15
  907. Debug: 916 12683 arm_dpm.c:186 dpm_read_reg(): READ: r3, 00000047
  908. Debug: 917 12683 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee004e15
  909. Debug: 918 12685 arm_dpm.c:186 dpm_read_reg(): READ: r4, 000f423f
  910. Debug: 919 12685 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee005e15
  911. Debug: 920 12686 arm_dpm.c:186 dpm_read_reg(): READ: r5, 0112a882
  912. Debug: 921 12686 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee006e15
  913. Debug: 922 12687 arm_dpm.c:186 dpm_read_reg(): READ: r6, 01036642
  914. Debug: 923 12687 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee007e15
  915. Debug: 924 12688 arm_dpm.c:186 dpm_read_reg(): READ: r7, 00000000
  916. Debug: 925 12688 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee008e15
  917. Debug: 926 12690 arm_dpm.c:186 dpm_read_reg(): READ: r8, 00000000
  918. Debug: 927 12690 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee009e15
  919. Debug: 928 12691 arm_dpm.c:186 dpm_read_reg(): READ: r9, 00000000
  920. Debug: 929 12691 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ae15
  921. Debug: 930 12692 arm_dpm.c:186 dpm_read_reg(): READ: r10, 00000000
  922. Debug: 931 12692 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00be15
  923. Debug: 932 12694 arm_dpm.c:186 dpm_read_reg(): READ: r11, ffa357fd
  924. Debug: 933 12694 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ce15
  925. Debug: 934 12695 arm_dpm.c:186 dpm_read_reg(): READ: r12, 00000000
  926. Debug: 935 12695 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00de15
  927. Debug: 936 12696 arm_dpm.c:186 dpm_read_reg(): READ: sp_usr, 00007ff0
  928. Debug: 937 12696 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ee15
  929. Debug: 938 12697 arm_dpm.c:186 dpm_read_reg(): READ: lr_usr, 000081f8
  930. Debug: 939 12697 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe1a0000f
  931. Debug: 940 12698 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  932. Debug: 941 12699 arm_dpm.c:186 dpm_read_reg(): READ: pc, 000081f8
  933. Debug: 942 12699 arm_dpm.c:67 dpm_mrc(): MRC p15, 0, r0, c1, c0, 0
  934. Debug: 943 12699 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee110f10
  935. Debug: 944 12700 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  936. Debug: 945 12701 cortex_a.c:1336 cortex_a_post_debug_entry(): cp15_control_reg: 00c50878
  937. Debug: 946 12701 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee120f50
  938. Debug: 947 12702 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  939. Debug: 948 12703 armv7a.c:144 armv7a_read_ttbcr(): ttbcr 0
  940. Debug: 949 12704 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100f10
  941. Debug: 950 12704 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  942. Info : 951 12705 armv7a.c:122 armv7a_read_midr(): bcmrpi2.cpu0 rev 5, partnum c07, arch f, variant 0, implementor 41
  943. Debug: 952 12705 armv7a.c:173 armv7a_read_ttbcr(): ttbr1 not used, ttbr0_mask ffffc000 ttbr1_mask ffffc000
  944. Debug: 953 12706 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100f30
  945. Debug: 954 12707 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  946. Debug: 955 12708 armv7a.c:588 armv7a_identify_cache(): ctr 84448003 ctr.iminline 32 ctr.dminline 64
  947. Debug: 956 12708 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f30
  948. Debug: 957 12709 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  949. Debug: 958 12710 armv7a.c:599 armv7a_identify_cache(): Number of cache levels to PoC 2
  950. Debug: 959 12710 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee500f10
  951. Debug: 960 12711 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  952. Debug: 961 12712 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000000
  953. Debug: 962 12712 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  954. Debug: 963 12713 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  955. Debug: 964 12714 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  956. Debug: 965 12714 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  957. Debug: 966 12715 armv7a.c:631 armv7a_identify_cache(): data/unified cache index 127 << 6, way 3 << 30
  958. Debug: 967 12715 armv7a.c:636 armv7a_identify_cache(): cacheline 64 bytes 32 KBytes asso 4 ways
  959. Debug: 968 12715 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000001
  960. Debug: 969 12715 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  961. Debug: 970 12716 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  962. Debug: 971 12717 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  963. Debug: 972 12717 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  964. Debug: 973 12718 armv7a.c:651 armv7a_identify_cache(): instruction cache index 511 << 5, way 1 << 31
  965. Debug: 974 12718 armv7a.c:656 armv7a_identify_cache(): cacheline 32 bytes 32 KBytes asso 2 ways
  966. Debug: 975 12718 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000002
  967. Debug: 976 12718 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  968. Debug: 977 12719 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  969. Debug: 978 12720 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  970. Debug: 979 12720 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  971. Debug: 980 12721 armv7a.c:631 armv7a_identify_cache(): data/unified cache index 1023 << 6, way 7 << 29
  972. Debug: 981 12721 armv7a.c:636 armv7a_identify_cache(): cacheline 64 bytes 512 KBytes asso 8 ways
  973. Debug: 982 12721 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000000
  974. Debug: 983 12721 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  975. Debug: 984 12722 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee500f10
  976. Debug: 985 12724 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100fb0
  977. Debug: 986 12725 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  978. Info : 987 12726 armv7a.c:506 armv7a_read_mpidr(): bcmrpi2.cpu0 cluster f core 0 multi core
  979. Debug: 988 12726 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000013
  980. Debug: 989 12726 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  981. Debug: 990 12726 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe12ff000
  982. Debug: 991 12727 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee070f95
  983. Debug: 992 12728 arm_dpm.c:67 dpm_mrc(): MRC p15, 0, r0, c3, c0, 0
  984. Debug: 993 12728 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee130f10
  985. Debug: 994 12729 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  986. Debug: 995 12730 cortex_a.c:1361 cortex_a_post_debug_entry(): cp15_dacr_reg: fe3fde7a
  987. Debug: 996 12730 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x800001da
  988. Debug: 997 12730 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  989. Debug: 998 12731 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe12ff000
  990. Debug: 999 12731 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee070f95
  991. Debug: 1000 12732 target.c:1499 target_call_event_callbacks(): target event 0 (gdb-halt)
  992. Debug: 1001 12732 target.c:1499 target_call_event_callbacks(): target event 1 (halted)
  993. User : 1002 12732 target.c:1934 target_arch_state(): bcmrpi2.cpu0: target state: halted
  994. Error: 1003 12732 armv4_5.c:167 arm_mode_name(): unrecognized psr mode: 0x1a
  995. User : 1004 12732 armv4_5.c:671 arm_arch_state(): target halted in ARM state due to debug-request, current mode: UNRECOGNIZED
  996. cpsr: 0x800001da pc: 0x000081f8
  997. User : 1005 12732 armv7a.c:724 armv7a_arch_state(): MMU: disabled, D-Cache: disabled, I-Cache: disabled
  998. Debug: 1006 12733 cortex_a.c:907 cortex_a_poll(): Target halted
  999. Debug: 1007 12733 cortex_a.c:1214 cortex_a_debug_entry(): dscr = 0x030c4003
  1000. Debug: 1008 12734 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1001. Debug: 1009 12735 arm_dpm.c:186 dpm_read_reg(): READ: r0, 00000001
  1002. Debug: 1010 12735 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe10f0000
  1003. Debug: 1011 12736 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1004. Error: 1012 12737 armv4_5.c:204 arm_mode_to_number(): invalid mode value encountered 26
  1005. Debug: 1013 12737 armv4_5.c:422 arm_set_cpsr(): set CPSR 0x600001da: User mode, ARM state
  1006. Debug: 1014 12737 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee001e15
  1007. Debug: 1015 12738 arm_dpm.c:186 dpm_read_reg(): READ: r1, 00000131
  1008. Debug: 1016 12738 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee002e15
  1009. Debug: 1017 12739 arm_dpm.c:186 dpm_read_reg(): READ: r2, e7f6c3fb
  1010. Debug: 1018 12739 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee003e15
  1011. Debug: 1019 12740 arm_dpm.c:186 dpm_read_reg(): READ: r3, 00000000
  1012. Debug: 1020 12740 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee004e15
  1013. Debug: 1021 12741 arm_dpm.c:186 dpm_read_reg(): READ: r4, 00000000
  1014. Debug: 1022 12741 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee005e15
  1015. Debug: 1023 12742 arm_dpm.c:186 dpm_read_reg(): READ: r5, 400000cc
  1016. Debug: 1024 12742 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee006e15
  1017. Debug: 1025 12743 arm_dpm.c:186 dpm_read_reg(): READ: r6, b4ffb6db
  1018. Debug: 1026 12743 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee007e15
  1019. Debug: 1027 12744 arm_dpm.c:186 dpm_read_reg(): READ: r7, 55debdcd
  1020. Debug: 1028 12744 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee008e15
  1021. Debug: 1029 12746 arm_dpm.c:186 dpm_read_reg(): READ: r8, 7fdbf977
  1022. Debug: 1030 12746 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee009e15
  1023. Debug: 1031 12748 arm_dpm.c:186 dpm_read_reg(): READ: r9, fbffedfb
  1024. Debug: 1032 12748 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ae15
  1025. Debug: 1033 12749 arm_dpm.c:186 dpm_read_reg(): READ: r10, bfd91fb5
  1026. Debug: 1034 12749 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00be15
  1027. Debug: 1035 12750 arm_dpm.c:186 dpm_read_reg(): READ: r11, c96ec4ee
  1028. Debug: 1036 12750 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ce15
  1029. Debug: 1037 12751 arm_dpm.c:186 dpm_read_reg(): READ: r12, 00000000
  1030. Debug: 1038 12751 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00de15
  1031. Debug: 1039 12752 arm_dpm.c:186 dpm_read_reg(): READ: sp_usr, edffd9a4
  1032. Debug: 1040 12752 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ee15
  1033. Debug: 1041 12753 arm_dpm.c:186 dpm_read_reg(): READ: lr_usr, cf7f6bc7
  1034. Debug: 1042 12753 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe1a0000f
  1035. Debug: 1043 12754 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1036. Debug: 1044 12755 arm_dpm.c:186 dpm_read_reg(): READ: pc, 000000cc
  1037. Debug: 1045 12755 arm_dpm.c:67 dpm_mrc(): MRC p15, 0, r0, c1, c0, 0
  1038. Debug: 1046 12755 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee110f10
  1039. Debug: 1047 12756 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1040. Debug: 1048 12757 cortex_a.c:1336 cortex_a_post_debug_entry(): cp15_control_reg: 00c50878
  1041. Debug: 1049 12758 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee120f50
  1042. Debug: 1050 12758 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1043. Debug: 1051 12759 armv7a.c:144 armv7a_read_ttbcr(): ttbcr 0
  1044. Debug: 1052 12760 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100f10
  1045. Debug: 1053 12760 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1046. Info : 1054 12762 armv7a.c:122 armv7a_read_midr(): bcmrpi2.cpu1 rev 5, partnum c07, arch f, variant 0, implementor 41
  1047. Debug: 1055 12762 armv7a.c:173 armv7a_read_ttbcr(): ttbr1 not used, ttbr0_mask ffffc000 ttbr1_mask ffffc000
  1048. Debug: 1056 12762 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100f30
  1049. Debug: 1057 12763 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1050. Debug: 1058 12764 armv7a.c:588 armv7a_identify_cache(): ctr 84448003 ctr.iminline 32 ctr.dminline 64
  1051. Debug: 1059 12764 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f30
  1052. Debug: 1060 12765 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1053. Debug: 1061 12766 armv7a.c:599 armv7a_identify_cache(): Number of cache levels to PoC 2
  1054. Debug: 1062 12766 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee500f10
  1055. Debug: 1063 12766 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1056. Debug: 1064 12768 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000000
  1057. Debug: 1065 12768 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1058. Debug: 1066 12768 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  1059. Debug: 1067 12769 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  1060. Debug: 1068 12770 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1061. Debug: 1069 12771 armv7a.c:631 armv7a_identify_cache(): data/unified cache index 127 << 6, way 3 << 30
  1062. Debug: 1070 12771 armv7a.c:636 armv7a_identify_cache(): cacheline 64 bytes 32 KBytes asso 4 ways
  1063. Debug: 1071 12771 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000001
  1064. Debug: 1072 12771 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1065. Debug: 1073 12771 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  1066. Debug: 1074 12772 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  1067. Debug: 1075 12773 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1068. Debug: 1076 12774 armv7a.c:651 armv7a_identify_cache(): instruction cache index 511 << 5, way 1 << 31
  1069. Debug: 1077 12774 armv7a.c:656 armv7a_identify_cache(): cacheline 32 bytes 32 KBytes asso 2 ways
  1070. Debug: 1078 12774 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000002
  1071. Debug: 1079 12774 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1072. Debug: 1080 12775 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  1073. Debug: 1081 12775 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  1074. Debug: 1082 12776 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1075. Debug: 1083 12777 armv7a.c:631 armv7a_identify_cache(): data/unified cache index 1023 << 6, way 7 << 29
  1076. Debug: 1084 12777 armv7a.c:636 armv7a_identify_cache(): cacheline 64 bytes 512 KBytes asso 8 ways
  1077. Debug: 1085 12777 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000000
  1078. Debug: 1086 12777 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1079. Debug: 1087 12778 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee500f10
  1080. Debug: 1088 12779 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100fb0
  1081. Debug: 1089 12779 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1082. Info : 1090 12781 armv7a.c:506 armv7a_read_mpidr(): bcmrpi2.cpu1 cluster f core 1 multi core
  1083. Debug: 1091 12781 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000013
  1084. Debug: 1092 12781 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1085. Debug: 1093 12781 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe12ff000
  1086. Debug: 1094 12782 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee070f95
  1087. Debug: 1095 12783 arm_dpm.c:67 dpm_mrc(): MRC p15, 0, r0, c3, c0, 0
  1088. Debug: 1096 12783 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee130f10
  1089. Debug: 1097 12784 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1090. Debug: 1098 12785 cortex_a.c:1361 cortex_a_post_debug_entry(): cp15_dacr_reg: efd9cf66
  1091. Debug: 1099 12785 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x600001da
  1092. Debug: 1100 12785 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1093. Debug: 1101 12786 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe12ff000
  1094. Debug: 1102 12787 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee070f95
  1095. Debug: 1103 12788 target.c:1499 target_call_event_callbacks(): target event 0 (gdb-halt)
  1096. Debug: 1104 12788 target.c:1499 target_call_event_callbacks(): target event 1 (halted)
  1097. User : 1105 12788 target.c:1934 target_arch_state(): bcmrpi2.cpu1: target state: halted
  1098. Error: 1106 12788 armv4_5.c:167 arm_mode_name(): unrecognized psr mode: 0x1a
  1099. User : 1107 12788 armv4_5.c:671 arm_arch_state(): target halted in ARM state due to debug-request, current mode: UNRECOGNIZED
  1100. cpsr: 0x600001da pc: 0x000000cc
  1101. User : 1108 12788 armv7a.c:724 armv7a_arch_state(): MMU: disabled, D-Cache: disabled, I-Cache: disabled
  1102. Debug: 1109 12789 cortex_a.c:907 cortex_a_poll(): Target halted
  1103. Debug: 1110 12789 cortex_a.c:1214 cortex_a_debug_entry(): dscr = 0x030c4003
  1104. Debug: 1111 12791 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1105. Debug: 1112 12792 arm_dpm.c:186 dpm_read_reg(): READ: r0, 00000002
  1106. Debug: 1113 12792 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe10f0000
  1107. Debug: 1114 12793 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1108. Error: 1115 12794 armv4_5.c:204 arm_mode_to_number(): invalid mode value encountered 26
  1109. Debug: 1116 12794 armv4_5.c:422 arm_set_cpsr(): set CPSR 0x600001da: User mode, ARM state
  1110. Debug: 1117 12794 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee001e15
  1111. Debug: 1118 12795 arm_dpm.c:186 dpm_read_reg(): READ: r1, 00000131
  1112. Debug: 1119 12795 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee002e15
  1113. Debug: 1120 12796 arm_dpm.c:186 dpm_read_reg(): READ: r2, 4bf6ff7f
  1114. Debug: 1121 12796 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee003e15
  1115. Debug: 1122 12797 arm_dpm.c:186 dpm_read_reg(): READ: r3, 00000000
  1116. Debug: 1123 12797 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee004e15
  1117. Debug: 1124 12798 arm_dpm.c:186 dpm_read_reg(): READ: r4, 00000000
  1118. Debug: 1125 12798 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee005e15
  1119. Debug: 1126 12799 arm_dpm.c:186 dpm_read_reg(): READ: r5, 400000cc
  1120. Debug: 1127 12799 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee006e15
  1121. Debug: 1128 12801 arm_dpm.c:186 dpm_read_reg(): READ: r6, fffffcff
  1122. Debug: 1129 12801 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee007e15
  1123. Debug: 1130 12803 arm_dpm.c:186 dpm_read_reg(): READ: r7, 3dff76ff
  1124. Debug: 1131 12803 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee008e15
  1125. Debug: 1132 12804 arm_dpm.c:186 dpm_read_reg(): READ: r8, eff8ffbf
  1126. Debug: 1133 12804 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee009e15
  1127. Debug: 1134 12806 arm_dpm.c:186 dpm_read_reg(): READ: r9, 76fe79ee
  1128. Debug: 1135 12806 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ae15
  1129. Debug: 1136 12807 arm_dpm.c:186 dpm_read_reg(): READ: r10, effdcf3a
  1130. Debug: 1137 12807 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00be15
  1131. Debug: 1138 12808 arm_dpm.c:186 dpm_read_reg(): READ: r11, fdb6fbfd
  1132. Debug: 1139 12808 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ce15
  1133. Debug: 1140 12809 arm_dpm.c:186 dpm_read_reg(): READ: r12, 00000000
  1134. Debug: 1141 12809 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00de15
  1135. Debug: 1142 12811 arm_dpm.c:186 dpm_read_reg(): READ: sp_usr, bfdfd7fd
  1136. Debug: 1143 12811 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee00ee15
  1137. Debug: 1144 12812 arm_dpm.c:186 dpm_read_reg(): READ: lr_usr, a64cff3f
  1138. Debug: 1145 12812 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe1a0000f
  1139. Debug: 1146 12813 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1140. Debug: 1147 12814 arm_dpm.c:186 dpm_read_reg(): READ: pc, 000000d0
  1141. Debug: 1148 12815 arm_dpm.c:67 dpm_mrc(): MRC p15, 0, r0, c1, c0, 0
  1142. Debug: 1149 12815 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee110f10
  1143. Debug: 1150 12815 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1144. Debug: 1151 12816 cortex_a.c:1336 cortex_a_post_debug_entry(): cp15_control_reg: 00c50878
  1145. Debug: 1152 12817 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee120f50
  1146. Debug: 1153 12818 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1147. Debug: 1154 12819 armv7a.c:144 armv7a_read_ttbcr(): ttbcr 0
  1148. Debug: 1155 12819 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100f10
  1149. Debug: 1156 12820 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1150. Info : 1157 12821 armv7a.c:122 armv7a_read_midr(): bcmrpi2.cpu2 rev 5, partnum c07, arch f, variant 0, implementor 41
  1151. Debug: 1158 12821 armv7a.c:173 armv7a_read_ttbcr(): ttbr1 not used, ttbr0_mask ffffc000 ttbr1_mask ffffc000
  1152. Debug: 1159 12821 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100f30
  1153. Debug: 1160 12822 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1154. Debug: 1161 12823 armv7a.c:588 armv7a_identify_cache(): ctr 84448003 ctr.iminline 32 ctr.dminline 64
  1155. Debug: 1162 12823 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f30
  1156. Debug: 1163 12824 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1157. Debug: 1164 12825 armv7a.c:599 armv7a_identify_cache(): Number of cache levels to PoC 2
  1158. Debug: 1165 12825 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee500f10
  1159. Debug: 1166 12826 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1160. Debug: 1167 12828 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000000
  1161. Debug: 1168 12828 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1162. Debug: 1169 12829 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  1163. Debug: 1170 12829 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  1164. Debug: 1171 12830 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1165. Debug: 1172 12831 armv7a.c:631 armv7a_identify_cache(): data/unified cache index 127 << 6, way 3 << 30
  1166. Debug: 1173 12831 armv7a.c:636 armv7a_identify_cache(): cacheline 64 bytes 32 KBytes asso 4 ways
  1167. Debug: 1174 12831 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000001
  1168. Debug: 1175 12831 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1169. Debug: 1176 12832 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  1170. Debug: 1177 12833 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  1171. Debug: 1178 12833 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1172. Debug: 1179 12834 armv7a.c:651 armv7a_identify_cache(): instruction cache index 511 << 5, way 1 << 31
  1173. Debug: 1180 12834 armv7a.c:656 armv7a_identify_cache(): cacheline 32 bytes 32 KBytes asso 2 ways
  1174. Debug: 1181 12834 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000002
  1175. Debug: 1182 12834 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1176. Debug: 1183 12835 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee400f10
  1177. Debug: 1184 12836 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee300f10
  1178. Debug: 1185 12836 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1179. Debug: 1186 12837 armv7a.c:631 armv7a_identify_cache(): data/unified cache index 1023 << 6, way 7 << 29
  1180. Debug: 1187 12837 armv7a.c:636 armv7a_identify_cache(): cacheline 64 bytes 512 KBytes asso 8 ways
  1181. Debug: 1188 12837 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000000
  1182. Debug: 1189 12837 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1183. Debug: 1190 12838 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee500f10
  1184. Debug: 1191 12839 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100fb0
  1185. Debug: 1192 12840 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1186. Info : 1193 12841 armv7a.c:506 armv7a_read_mpidr(): bcmrpi2.cpu2 cluster f core 2 multi core
  1187. Debug: 1194 12841 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x00000013
  1188. Debug: 1195 12841 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1189. Debug: 1196 12843 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe12ff000
  1190. Debug: 1197 12844 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee070f95
  1191. Debug: 1198 12845 arm_dpm.c:67 dpm_mrc(): MRC p15, 0, r0, c3, c0, 0
  1192. Debug: 1199 12845 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee130f10
  1193. Debug: 1200 12845 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee000e15
  1194. Debug: 1201 12846 cortex_a.c:1361 cortex_a_post_debug_entry(): cp15_dacr_reg: efcf97b7
  1195. Debug: 1202 12846 cortex_a.c:562 cortex_a_write_dcc(): write DCC 0x600001da
  1196. Debug: 1203 12846 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee100e15
  1197. Debug: 1204 12847 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xe12ff000
  1198. Debug: 1205 12848 cortex_a.c:333 cortex_a_exec_opcode(): exec opcode 0xee070f95
  1199. Debug: 1206 12849 target.c:1499 target_call_event_callbacks(): target event 0 (gdb-halt)
  1200. Debug: 1207 12849 target.c:1499 target_call_event_callbacks(): target event 1 (halted)
  1201. User : 1208 12849 target.c:1934 target_arch_state(): bcmrpi2.cpu2: target state: halted
  1202. Error: 1209 12849 armv4_5.c:167 arm_mode_name(): unrecognized psr mode: 0x1a
  1203. User : 1210 12849 armv4_5.c:671 arm_arch_state(): target halted in ARM state due to debug-request, current mode: UNRECOGNIZED
  1204. cpsr: 0x600001da pc: 0x000000d0
  1205. User : 1211 12849 armv7a.c:724 armv7a_arch_state(): MMU: disabled, D-Cache: disabled, I-Cache: disabled
  1206.  
  1207.  
  1208.  
  1209.  
  1210.  
  1211.  
  1212.  
  1213.  
  1214.  
  1215.  
  1216.  
  1217.  
  1218. the config files I use:
  1219.  
  1220. alex@ALeX-VirtualBox:~$ cat scripts/RPi_HUB_Module.cfg
  1221. #
  1222. # FTDI RPi HUB Module
  1223. #
  1224. # http://www.ftdichip.com/
  1225. #
  1226.  
  1227. #interface ft2232
  1228. interface ftdi
  1229. ftdi_device_desc "FT2232H RPi HUB Module"
  1230. #ft2232_layout RPI2
  1231. #ft2232h_vid_pid 0x0403 0xcff8
  1232. ftdi_channel 0
  1233. ftdi_vid_pid 0x0403 0x6010
  1234. ftdi_layout_init 0x0018 0x00FB
  1235. ftdi_layout_signal nTRST -data 0x0020
  1236.  
  1237.  
  1238. ---------------------------------------------------------------------------
  1239. alex@ALeX-VirtualBox:~$ cat scripts/RPi_HUB_Module.cfg
  1240. #
  1241. # FTDI RPi HUB Module
  1242. #
  1243. # http://www.ftdichip.com/
  1244. #
  1245.  
  1246. #interface ft2232
  1247. interface ftdi
  1248. ftdi_device_desc "FT2232H RPi HUB Module"
  1249. #ft2232_layout RPI2
  1250. #ft2232h_vid_pid 0x0403 0xcff8
  1251. ftdi_channel 0
  1252. ftdi_vid_pid 0x0403 0x6010
  1253. ftdi_layout_init 0x0018 0x00FB
  1254. ftdi_layout_signal nTRST -data 0x0020
  1255. transport select jtagalex@ALeX-VirtualBox:~$ cat scripts/raspi2.cfg
  1256. telnet_port 4444
  1257. #TODO: Verify gdb setup works as intended.
  1258. #TODO: With the command "cache_config" we could configure the L2 cache and avoid the problem which occurs if you wait too long to connect via JTAG...
  1259. gdb_port 3333
  1260. #tcl_port 0 #No Tcl port needed...
  1261.  
  1262. #jtag_khz 1000 #Not needed?
  1263. adapter_khz 1000
  1264.  
  1265. if { [info exists CHIPNAME] } {
  1266. set _CHIPNAME $CHIPNAME
  1267. } else {
  1268. set _CHIPNAME bcmrpi2
  1269. }
  1270.  
  1271. if { [info exists DAP_TAPID] } {
  1272. set _DAP_TAPID $DAP_TAPID
  1273. } else {
  1274. set _DAP_TAPID 0x4ba00477
  1275. }
  1276.  
  1277. jtag newtap $_CHIPNAME dap -expected-id $_DAP_TAPID -irlen 4 -ircapture 0x01 -irmask 0x0f
  1278.  
  1279. set _TARGETNAME0 $_CHIPNAME.cpu0
  1280. set _TARGETNAME1 $_CHIPNAME.cpu1
  1281. set _TARGETNAME2 $_CHIPNAME.cpu2
  1282. set _TARGETNAME3 $_CHIPNAME.cpu3
  1283.  
  1284. target create $_TARGETNAME0 cortex_a -chain-position $_CHIPNAME.dap -coreid 0 -dbgbase 0x80010000
  1285. target create $_TARGETNAME1 cortex_a -chain-position $_CHIPNAME.dap -coreid 1 -dbgbase 0x80012000
  1286. target create $_TARGETNAME2 cortex_a -chain-position $_CHIPNAME.dap -coreid 2 -dbgbase 0x80014000
  1287. target create $_TARGETNAME3 cortex_a -chain-position $_CHIPNAME.dap -coreid 3 -dbgbase 0x80016000
  1288. target smp $_TARGETNAME0 $_TARGETNAME1 $_TARGETNAME2 $_TARGETNAME3
  1289.  
  1290. $_TARGETNAME0 configure -event gdb-attach {
  1291. cortex_a dbginit
  1292. }
  1293. $_TARGETNAME1 configure -event gdb-attach {
  1294. cortex_a dbginit
  1295. }
  1296. $_TARGETNAME2 configure -event gdb-attach {
  1297. cortex_a dbginit
  1298. }
  1299. $_TARGETNAME3 configure -event gdb-attach {
  1300. cortex_a dbginit
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