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Transmitter

meffcio Mar 16th, 2015 36 Never
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  1. /* ========================================
  2.  *
  3.  * Copyright YOUR COMPANY, THE YEAR
  4.  * All Rights Reserved
  5.  * UNPUBLISHED, LICENSED SOFTWARE.
  6.  *
  7.  * CONFIDENTIAL AND PROPRIETARY INFORMATION
  8.  * WHICH IS THE PROPERTY OF your company.
  9.  *
  10.  * ========================================
  11. */
  12. #include <project.h>
  13.  
  14. #define R_REGISTER                  0x00 // 0000 0000 - logically OR with a register address
  15. #define W_REGISTER                  0x20 // 0010 0000 - as above
  16. #define R_RX_PAYLOAD            0x61 // 0110 0001
  17. #define W_TX_PAYLOAD            0xA0 // 1010 0000
  18. #define NOP                 0xFF // to get the STATUS register
  19.  
  20. #define CONFIG                      0x00
  21. //#define EN_AA                     0x01
  22. //#define EN_RXADDR                 0x02
  23. #define SETUP_AW                    0x03
  24. //#define RF_CH                     0x05
  25. //#define RF_SETUP                  0x06
  26. #define STATUS                      0x07
  27. //#define RX_ADDR_P0            0x0A
  28. //#define TX_ADDR                   0x10
  29. #define RX_PW_P0                    0x11
  30. #define FIFO_STATUS             0x17
  31. #define DUMMYDATA           0x55 // 0101 0101 - just so it doesn't look like anything else
  32.  
  33. #define TX_DS                           0x20
  34. #define MAX_RT                          0x10 // both for STATUS register
  35.  
  36. int main()
  37. {
  38.     uint8 spiData[2];
  39.     uint8 status;
  40.    
  41.     CyGlobalIntEnable;
  42.     SPI_Start();
  43.    
  44.     spiData[0] = W_REGISTER | CONFIG;
  45.     spiData[1] = 0x4E;
  46.     SPI_SpiUartPutArray(spiData,  2);       // reflect TX_DS and MAX_RT interrupts as IRQ active low, enable 2-byte CRC, power-up, TX mode
  47.    
  48.     spiData[0] = W_REGISTER | SETUP_AW;
  49.     spiData[1] = 0x03;
  50.     SPI_SpiUartPutArray(spiData,  2);       // 5 byte address
  51.    
  52.     spiData[0] = W_REGISTER | RX_PW_P0;
  53.     spiData[1] = 0x01;
  54.     SPI_SpiUartPutArray(spiData,  2);       // 1 byte of payload
  55.    
  56.     CE_Write(0);                            // stand-by
  57.    
  58.     for(;;)
  59.     {
  60.         spiData[0] = W_TX_PAYLOAD;
  61.         spiData[1] = SW1_Read();
  62.         SPI_SpiUartPutArray(spiData,  2);                   // send state of the switch to the TX FIFO
  63.         CE_Write(1);                                        // enable chip - start sending data
  64.         CyDelayUs(10);                                      // wait 10 microseconds
  65.         if ( IRQ_Read() == 0 ){                             // check if there's an interrupt
  66.             SPI_SpiUartWriteTxData(NOP);                    // send no-operation to receive STATUS register and check kind of the interrupt
  67.             status = SPI_SpiUartReadRxData();               // read status register into a variable
  68.             if ((status & TX_DS) == 1){                     // if data sent (or received when using enhanced shockburst mode) we're ok, so:
  69.                 CE_Write(0);                                // stop sending
  70.                 LED_Write(!LED_Read());                     // toggle LED state
  71.                 spiData[0]=STATUS;
  72.                 spiData[1]=TX_DS;
  73.                 SPI_SpiUartPutArray(spiData,  2);           // clear interrupt
  74.             } else if ((status & MAX_RT) == 1) {            // if max retries achieved, we basically forget that packet
  75.                 CE_Write(0);                                // stop sending
  76.                 spiData[0]=STATUS;
  77.                 spiData[1]=MAX_RT;
  78.                 SPI_SpiUartPutArray(spiData,  2);           // clear interrupt
  79.             }
  80.         }
  81.        
  82.     }
  83. }
  84.  
  85. /* [] END OF FILE */
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