/* Sadly, the MCC doesn't know about 28-pin SPDIP package for 24F PIC series, so
 * we need to write initialization code by ourself
 *
 * Initialization must be done as follows:
 *
 * 1) Select pin alternate functions for both SPI1 and SPI2
 * 2) Select GPIO mode and directions for pins -READY_D and -READY_H
 *
 * The pinout for the SPDIP-28 package can be found on page 4 of the manual. For
 * SPI1 we use pins 2, 3, 4 and 5 for MOSI, MISO, CLK and -SS functions respectively.
 * For SPI2 pins 15, 16, 17 and 18 will be used. Here mapping of the physical
 * pin numbers to logical RP pins:
 *
 *           SPI-1               SPI-2
 * MOSI     2 (RP26)            15 (RP6)
 * MISO     3 (RP27)            16 (RP7)
 * CLK      6 (RP2)             17 (RP8)
 * -CS      7 (RP3)             18 (RP9)
 *
 * See tables 11-6 for input mapping info and 11-7 for output function numbers
 */
void
init_pins(void)
{
    /* Unlock configuration registers
     */
    __builtin_write_OSCCONL(OSCCON & 0xBF);
#if 0
    /* APF for SPI1
     */
    RPINR20bits.SDI1R = 26;         // SDI (RP26)
    RPOR13bits.RP27R = _RPOUT_SDO1; // SDO
    RPINR20bits.SCK1R = 2;          // CLK (RP2)
    RPINR21bits.SS1R = 3;           // -SS (RP3)

    /* APF for SPI2
     */
    RPINR22bits.SDI2R = 6;          // SDI (RP6)
    RPOR3bits.RP7R = _RPOUT_SDO2;   // SDO
    RPINR22bits.SCK2R = 8;          // CLK (RP8)
    RPINR23bits.SS2R = 9;           // -SS (RP9)
#else
    RPINR20bits.SDI1R = 0x001A;     //RA0->SPI1:SDI1;
    RPOR13bits.RP27R = 0x0007;      //RA1->SPI1:SDO1;
    RPINR20bits.SCK1R = 0x0002;     //RB2->SPI1:SCK1IN;
    RPINR21bits.SS1R = 0x0003;      //RB3->SPI1:SS1IN;

    RPINR22bits.SDI2R = 0x0006;     //RB6->SPI2:SDI2;
    RPOR3bits.RP7R = 0x000A;        //RB7->SPI2:SDO2;
    RPINR22bits.SCK2R = 0x0008;     //RB8->SPI2:SCK2IN;
    RPINR23bits.SS2R = 0x0009;      //RB9->SPI2:SS2IN;
#endif
    /* Lock registers back
     */
     __builtin_write_OSCCONL(OSCCON | 0x40);

#define CON1L_FLAGS ( \
        (1<<15) /* SPIEN=1                              */ | \
        (1<<8)  /* CKE=1                                */ | \
        (0<<7)  /* SEN=0                                */ | \
        (1<<6)  /* CKP=1, Idle on high level            */ | \
        (0<<5)  /* MSTEN=0 Slave mode                   */ | \
        (1<<0)  /* ENHBUF=1 Enhanced Buffer mode enable */ \
    )


    // AUDEN disabled; FRMEN enabled; AUDMOD I2S; FRMSYPW One clock wide; AUDMONO stereo; FRMCNT 0; MSSEN disabled; FRMPOL disabled; IGNROV disabled; SPISGNEXT not sign-extended; FRMSYNC disabled; URDTEN disabled; IGNTUR disabled;
    SPI1CON1H = 0x0010;
    // WLENGTH 0;
    SPI1CON2L = 0x0000;
    // SPIROV disabled; FRMERR disabled;
    SPI1STATL = 0x0000;
    // SPI1BRGL 0;
    SPI1BRGL = 0x0000;
    // SPITBFEN disabled; SPITUREN disabled; FRMERREN disabled; SRMTEN disabled; SPIRBEN disabled; BUSYEN disabled; SPITBEN disabled; SPIROVEN disabled; SPIRBFEN disabled;
    SPI1IMSKL = 0x0000;
    // RXMSK 0; TXWIEN disabled; TXMSK 0; RXWIEN disabled;
    SPI1IMSKH = 0x0000;
    // SPI1URDTL 0;
    SPI1URDTL = 0x0000;
    // SPI1URDTH 0;
    SPI1URDTH = 0x0000;
    // SPIEN enabled; DISSDO disabled; MCLKEN FOSC/2; CKP Idle:High, Active:Low; SSEN enabled; MSTEN Slave; MODE16 disabled; SMP Middle; DISSCK disabled; SPIFE Frame Sync pulse precedes; CKE Idle to Active; MODE32 disabled; SPISIDL disabled; ENHBUF enabled; DISSDI disabled;
    SPI1CON1L = 0x8101;


    // AUDEN disabled; FRMEN enabled; AUDMOD I2S; FRMSYPW One clock wide; AUDMONO stereo; FRMCNT 0; MSSEN disabled; FRMPOL disabled; IGNROV disabled; SPISGNEXT not sign-extended; FRMSYNC disabled; URDTEN disabled; IGNTUR disabled;
    SPI2CON1Lbits.SPIEN = 0;

    SPI2BUFL = 0;
    SPI2BUFH = 0;

    IFS2bits.SPI2IF = 0;
    IFS3bits.SPI2RXIF = 0;
    IPC8bits.SPI2IP = 5;
    IPC14bits.SPI2RXIP = 5;

    IEC2bits.SPI2IE = 1;
    IEC3bits.SPI2RXIE = 1;

    SPI2STATLbits.SPIROV = 0;

    SPI2CON1L = 0x0000;

    SPI2CON1Lbits.SPIEN = 1;

    /* Enable SPI RX interrupts
     */
    IEC0bits.SPI1IE = 1;
    IEC3bits.SPI1RXIE = 1;

    IFS0bits.SPI1IF = 0;
    IFS3bits.SPI1RXIF = 0;

    /* Setup GPIOs
     */
    LATA = 0x0000;
    LATB = 0x0000;

    TRISA = 0x000D;
    TRISB = 0xFF4F;

    ANSA = 0x0000;          // All pins is digital
    ANSB = 0x0000;

    /* IOC
     */
    IOCNAbits.IOCNA2 = 1;   // Enable IOC on RA2 on high-to-low transition
    IOCNBbits.IOCNB10 = 1;  // .. and on the RB10
    IEC1bits.IOCIE = 1;     // Global enable IOC interrupts
    PADCONbits.IOCON = 1;   // Enable Interrupt-on-change functionality
    IFS1bits.IOCIF = 0;     // clear IOC interrupt flag
    IPC4bits.IOCIP = 1;

    IOCFA = 0;
}