20141009_KUAS_Verilog_Multiplier_3Bit

/************************************/
/** 20141009 3-Bit Multiplier      **/
/** Maker  : Yan                   **/
/** E-Mail : [email protected] **/
/** Date   : 2014/10/09 pm.10:00   **/
/************************************/

module Multiplier_3Bit(num_a, num_b, _output);
    input   [2:0]   num_a, num_b;
    output  [5:0]   _output;
    wire    [5:0]   w1, w2, w3;

    assign  w1 = num_a & {3{num_b[0]}};
    assign  w2 = (num_a & {3{num_b[1]}}) << 1;
    assign  w3 = (num_a & {3{num_b[2]}}) << 2;

    assign  _output = w1 + w2 + w3;
endmodule