Finish him

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

entity Klawiatura is
    Port ( clk_i : in  STD_LOGIC;
           ps2_clk_i : in  STD_LOGIC;
           rst_i : in  STD_LOGIC;
           ps2_data_i : in  STD_LOGIC;
           led7_an_o : out  STD_LOGIC_VECTOR (3 downto 0) := "1110";
           led7_seg_o : out  STD_LOGIC_VECTOR (7 downto 0) := "11111111");
end Klawiatura;

architecture Behavioral of Klawiatura is
component F_edge_detector
    Port ( clk_i      : in  std_logic;
             ps2_clk_i  : in  std_logic;
             pulse_o    : out std_logic);
end component;

signal DANE : std_logic_vector (7 downto 0);
signal BUFOR : std_logic_vector (10 downto 0);
signal F_EDGE : std_logic;
signal IGNORUJ : std_logic := '0';
--signal NASLUCH : std_logic := '1';
signal i : integer range 0 to 11 := 0;
signal j : integer range 0 to 200 := 0;                                                                         -- zmienić 200 na 2500000 (2 500 000)

begin
    led7_an_o <= "1110";
    led7_seg_o(0) <= '1';
    ET1: F_edge_detector port map (clk_i => clk_i, ps2_clk_i => ps2_clk_i, pulse_o => F_EDGE);

    Zapis : process (clk_i) is
    begin
        if rising_edge(clk_i) then
--          if NASLUCH = '1' then
--              if ps2_data_i = '0' then
--                  NASLUCH <= '0';
--              end if;
--          else
                if ps2_clk_i = '1' then
                    j <= 0;
                end if;
                if i = 0 then
                    j <= j + 1;
                end if;
                if j = 200 then                                                             -- do symulacji 200, normalnie 2500000 (2 500 000)
                    IGNORUJ <= '0';
                end if;

                if i = 11 then
                    i <= 0;
                    if BUFOR(8 downto 1) = x"F0" then
--                      NASLUCH <= '1';
                        IGNORUJ <= '1';
                    else
                        if IGNORUJ = '0' then
                            DANE <= BUFOR(8 downto 1);
                        end if;
                        if DANE = x"F0" then
                            IGNORUJ <= '1';
                        end if;
                    end if;
                elsif F_EDGE = '1' then
                    BUFOR(i) <= ps2_data_i;
                    i <= i + 1;
                end if;
--          end if;
        end if;
    end process Zapis;

    Wyswietlenie : process (rst_i, clk_i) is
    begin
        if (rst_i = '1') then
            led7_seg_o <= "11111111";
        elsif rising_edge(clk_i) then
            if DANE /= x"F0" then
            case DANE is
                when x"45" => led7_seg_o(7 downto 1) <= "0000001";  --0
                when x"16" => led7_seg_o(7 downto 1) <= "1001111";  --1
                when x"1E" => led7_seg_o(7 downto 1) <= "0010010";  --2
                when x"26" => led7_seg_o(7 downto 1) <= "0000110";  --3
                when x"25" => led7_seg_o(7 downto 1) <= "1001100";  --4
                when x"2E" => led7_seg_o(7 downto 1) <= "0100100";  --5
                when x"36" => led7_seg_o(7 downto 1) <= "0100000";  --6
                when x"3D" => led7_seg_o(7 downto 1) <= "0001111";  --7
                when x"3E" => led7_seg_o(7 downto 1) <= "0000000";  --8
                when x"46" => led7_seg_o(7 downto 1) <= "0000100";  --9
                when x"1C" => led7_seg_o(7 downto 1) <= "0001000";  --a trzecia litera do symulacji
                when x"32" => led7_seg_o(7 downto 1) <= "1100000";  --b
                when x"21" => led7_seg_o(7 downto 1) <= "0110001";  --c
                when x"23" => led7_seg_o(7 downto 1) <= "1000010";  --d
                when x"24" => led7_seg_o(7 downto 1) <= "0110000";  --e    pierwsza litera do symulacji
                when x"2B" => led7_seg_o(7 downto 1) <= "0111000";  --f  druga litera do symulacji
                when others => led7_seg_o(7 downto 1) <= "1111111";
            end case;
            end if;
        end if;
    end process;

end Behavioral;