+void dwc_otg_power_on (void)
+{
+   // clear power
+   writel(readl(DANUBE_PMU_PWDCR) | 0x41, DANUBE_PMU_PWDCR);
+   // set clock gating
+   writel(readl(DANUBE_CGU_IFCCR) | 0x30, DANUBE_CGU_IFCCR);
+   // set power
+   writel(readl(DANUBE_PMU_PWDCR) & ~0x1, DANUBE_PMU_PWDCR);
+   writel(readl(DANUBE_PMU_PWDCR) & ~0x40, DANUBE_PMU_PWDCR);
+   writel(readl(DANUBE_PMU_PWDCR) & ~0x8000, DANUBE_PMU_PWDCR);





    // set clock gating
    set_bit (4, DANUBE_CGU_IFCCR);
        set_bit (5, DANUBE_CGU_IFCCR);

        // set power
        clear_bit (0, DANUBE_PMU_PWDCR);
        clear_bit (6, DANUBE_PMU_PWDCR);
        clear_bit (15, DANUBE_PMU_PWDCR);







        ifxmips_w32(0x8b87, IFXMIPS_GPIO_P1_ALTSEL0);
                ifxmips_w32(0x400, IFXMIPS_GPIO_P1_ALTSEL1);
                ifxmips_w32(0xf3fc, IFXMIPS_GPIO_P1_OD);
                ifxmips_w32(0xfb3e, IFXMIPS_GPIO_P1_DIR);
                ifxmips_w32(0x850, IFXMIPS_GPIO_P1_PUDSEL);
                ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P1_OUT) | (1<<13), IFXMIPS_GPIO_P1_OUT);

to ifxmips_usb_vbus_enable function.