Nazarov_circ_3

library ieee;
use ieee.std_logic_1164.all;
entity circuit_3 is
    port (
        pin_name : in STD_LOGIC;
        pin_name1 : in STD_LOGIC;
        pin_name2 : in STD_LOGIC;
        pin_name6 : out STD_LOGIC);
end circuit_3;

architecture Behavioral of circuit_3 is
begin
    pin_name6 <= ( ((pin_name or not pin_name1) and (pin_name2)) or (not pin_name and pin_name1 and not pin_name2) );
end Behavioral;