Advertisement
timurkanaz

Nazarov_circ_3

Jan 10th, 2021
289
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
  1. library ieee;
  2. use ieee.std_logic_1164.all;
  3. entity circuit_3 is
  4.     port (  
  5.         pin_name : in STD_LOGIC;
  6.         pin_name1 : in STD_LOGIC;
  7.         pin_name2 : in STD_LOGIC;
  8.         pin_name6 : out STD_LOGIC);
  9. end circuit_3;
  10.  
  11. architecture Behavioral of circuit_3 is
  12. begin
  13.     pin_name6 <= ( ((pin_name or not pin_name1) and (pin_name2)) or (not pin_name and pin_name1 and not pin_name2) );
  14. end Behavioral;
Advertisement
RAW Paste Data Copied
Advertisement