#include <avr/io.h>
#include <stdio.h>
#include <util/delay.h>
#include <avr/interrupt.h>

#include "nrf24l01.h"
#include "my_usartlib.h"

void initSPI();
uint8_t writeByteSPI(uint8_t);
uint8_t readReg(uint8_t);
void writeReg(uint8_t, uint8_t);
uint8_t *readRegArray(uint8_t, uint8_t *data, uint8_t);
void nrf24l01_init();
void nrf_transmit(uint8_t * W_buff);
void reset_IRQ();


uint8_t rx_address[] = {0x12, 0x12, 0x12, 0x12, 0x12};
uint8_t tx_address[] = {0x12, 0x12, 0x12, 0x12, 0x12};

volatile uint8_t tx_flag = 0x00;
uint8_t tx_buffer[5];

int main(void){

    usart_init();

    DDRD |= (1<<6);     //D6 (LED) input
    DDRD &= ~(1<<2);    //D2 (INT0) input

    initSPI();

    for(int i = 0; i < 5; i++){
        tx_buffer[i] = 2*i;
    }

    nrf24l01_init();

    PORTD |= (1<<6);
    _delay_ms(500);
    PORTD &= ~(1<<6);
    _delay_ms(500);     //flash LED to denote success

    EICRA |= (1<<ISC01);    //Falling edge detect
    EIMSK |= (1<<INT0);

    usart_tx_string("CONFIG = 0x");
    usart_tx_val(readReg(CONFIG), 16); usart_tx('\n');

    sei();
    usart_tx_string("TX Init Success\n");

    while (1) {
        _delay_ms(2000);

        nrf_transmit(tx_buffer);
        _delay_ms(10);          // allow STATUS to update

        if((readReg(STATUS) & (1<<4)) != 0){
            usart_tx_string("TX Failure\n");
        } else{
            usart_tx_string("TX Success\n");
        }

        usart_tx_string("STATUS = 0x");
        usart_tx_val(readReg(STATUS), 16); usart_tx('\n');

        reset_IRQ();
    }
}

void initSPI(){
    DDRB |= (1<<DDB5) | (1<<DDB3) | (1<<DDB2) | (1<<DDB1);

    SPCR |= (1<<SPE) | (1<<MSTR);

    PORTB |= (1 << 2);  // CSN High
    PORTB &= ~(1 << 1); // CE low
}

uint8_t writeByteSPI(uint8_t cData){
    SPDR = cData;
    while(!(SPSR & (1<<SPIF)));
    return SPDR;
}

uint8_t readReg(uint8_t reg){
    _delay_us(10);
    PORTB &= ~(1 << 2);

    _delay_us(10);
    writeByteSPI(R_REGISTER + reg);

    _delay_us(10);
    reg = writeByteSPI(NOP);

    _delay_us(10);
    PORTB |= (1 << 2);
    return reg;
}

void writeReg(uint8_t reg, uint8_t data){
    _delay_us(10);
    PORTB &= ~(1 << 2);

    _delay_us(10);
    writeByteSPI(W_REGISTER + reg);

    _delay_us(10);
    writeByteSPI(data);

    _delay_us(10);
    PORTB |= (1 << 2);
}

void writeRegArray(uint8_t reg, uint8_t *data, uint8_t data_length){
    _delay_us(10);
    PORTB &= ~(1 << 2);
    _delay_us(10);
    writeByteSPI(W_REGISTER + reg);
    _delay_us(10);

    for(int i = 0; i < data_length; i++){
        writeByteSPI(data[i]);
        _delay_us(10);
    }

    PORTB |= (1 << 2);
}

uint8_t *readRegArray(uint8_t reg, uint8_t *data, uint8_t data_length){
    static uint8_t ret[32];

    _delay_us(10);
    PORTB &= ~(1 << 2);
    _delay_us(10);
    writeByteSPI(reg);
    _delay_us(10);

    for(int i = 0; i < data_length; i++){
        ret[i] = writeByteSPI(NOP);
        _delay_us(10);
    }

    PORTB |= (1 << 2);

    return ret;
}

void nrf24l01_init(){
    _delay_ms(100);

    writeReg(EN_AA, 0x3F);      //enable auto-ack
    writeReg(SETUP_RETR, 0x2F); //15 retries at 750us for EN_AA

    writeReg(EN_RXADDR, 0x03);  //enable data pipe 0 & 1

    writeReg(SETUP_AW, 0x03);   //5 bytes of rx address

    writeReg(RF_CH, 0x01);      //2.401GHz frequency

    writeReg(RF_SETUP, 0x07);   //power and range modes

    writeRegArray(RX_ADDR_P0, tx_address, 5);
    writeRegArray(TX_ADDR, tx_address, 5);

    writeReg(RX_PW_P0, 5);  //5 byte payload width
    writeReg(RF_SETUP, 0x08);   //lowest power
    writeReg(CONFIG, 0x5E); //transmitter, TX_DS interrupt
    _delay_ms(100);
}

void nrf_transmit(uint8_t * W_buff){
    readRegArray(FLUSH_TX, W_buff, 0);
    readRegArray(W_TX_PAYLOAD, W_buff, 5);

    _delay_ms(10);
    PORTB |= (1 << 1);  //CE high, transmit data
    _delay_us(20);
    PORTB &= ~(1 << 1); //CE low, stop transmitting
    _delay_ms(10);

}

void reset_IRQ(void){
    writeReg(STATUS, 0x70);
}

ISR(INT0_vect){
    PORTD |= (1<<6);
    _delay_ms(50);
    PORTD &= ~(1<<6);
    //tx_flag = 0xFF;
}