architecture RingCounter of Counter is
signal count : unsigned(7 downto 0);
begin
process(reset, Clock)
begin
    if reset = '1' then
        count <= "00000000";
    else if rising_edge(Clock) then
        if Enable = '1' then
            if Load = '1' then
                count <= unsigned(Data);
            else if UpOn = '1' then
                if count = "00000000" or count = "10000000" then
                    count <= "00000001";
                else
                    count <= count(6 downto 0Ã) & '0';
                end if;
            else if upDn = '0' then
                if (count = "00000000" or count "00000001" then
                    count <= "10000000";
                else
                    count <= '0' & count(7 downto 1);
                end if;
            end if;
        end if;
    end if;

end process
end architecture;