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- process(clock, reset)
- begin
- if rising_edge(clock) then
- fifo_count <= fifo_count + 1;
- fifo_wren <= '0';
- if (fifo_count > 10 and fifo_count < 30) or (fifo_count > 35) then
- if fifo_almost_full = '0' then
- -- if fifo_count(0) = '1' then
- fifo_wren <= '1';
- fifo_din <= std_logic_vector(fifo_count);
- -- end if;
- end if;
- end if;
- if fifo_valid = '1' then
- fifo_valid_reg <= '1';
- end if;
- fifo_rdack <= '0';
- if fifo_valid_reg = '1' then
- foo <= fifo_dout;
- fifo_rdack <= '1';
- end if;
- end if;
- if reset = '1' then
- fifo_count <= (others => '0');
- fifo_wren <= '0';
- fifo_rdack <= '0';
- fifo_valid_reg <= '0';
- end if;
- end process;
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