/*******************************************************************************
 * I2C analog filter may provide wrong value, locking BUSY flag and
 * preventing master mode entry
 ******************************************************************************/
void I2C_FixByErrata() {
#ifdef SYSTEM_STM32
    //1. Disable the I2C peripheral by clearing the PE bit in I2Cx_CR1 register
    I2C2->CR1 &= ~I2C_CR1_PE;
    //2. Configure the SCL and SDA I/Os as General Purpose Output Open-Drain, High level (Write 1 to GPIOx_ODR).
    GPIOB->CRH &= ~(GPIO_CRH_CNF10_1 | GPIO_CRH_CNF11_1);
    //3. Check SCL and SDA High level in GPIOx_IDR.
    while(!(GPIOB->IDR & GPIO_IDR_IDR10) || !(GPIOB->IDR & GPIO_IDR_IDR11)); //SCL SDA
    //4. Configure the SDA I/O as General Purpose Output Open-Drain, Low level (Write 0 to GPIOx_ODR).
    GPIOB->ODR &= ~GPIO_ODR_ODR11;
    //5. Check SDA Low level in GPIOx_IDR.
    while(GPIOB->IDR & GPIO_IDR_IDR11);
    //6. Configure the SCL I/O as General Purpose Output Open-Drain, Low level (Write 0 to GPIOx_ODR).
    GPIOB->ODR &= ~GPIO_ODR_ODR10;
    //7. Check SCL Low level in GPIOx_IDR.
    while(GPIOB->IDR & GPIO_IDR_IDR10);
    //8. Configure the SCL I/O as General Purpose Output Open-Drain, High level (Write 1 to GPIOx_ODR).
    GPIOB->ODR |= GPIO_ODR_ODR10;
    //9. Check SCL High level in GPIOx_IDR.
    while(!(GPIOB->IDR & GPIO_IDR_IDR10));
    //10. Configure the SDA I/O as General Purpose Output Open-Drain , High level (Write 1 to GPIOx_ODR).
    GPIOB->ODR |= GPIO_ODR_ODR11;
    //11. Check SDA High level in GPIOx_IDR.
    while(!(GPIOB->IDR & GPIO_IDR_IDR11));
    //12. Configure the SCL and SDA I/Os as Alternate function Open-Drain.
    GPIOB->CRH |= GPIO_CRH_CNF10_1 | GPIO_CRH_CNF11_1;
    //13. Set SWRST bit in I2Cx_CR1 register.
    I2C2->CR1 |= I2C_CR1_SWRST;
    //14. Clear SWRST bit in I2Cx_CR1 register.
    I2C2->CR1 &= ~I2C_CR1_SWRST;
    //15. Enable the I2C peripheral by setting the PE bit in I2Cx_CR1 register
    I2C2->CR1 &= ~I2C_CR1_PE;
#endif
}